Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Guillaume Patrigeon"'
Autor:
Guillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory Di Pendina
Publikováno v:
IEEE Access, Vol 7, Pp 58085-58093 (2019)
The complexity of embedded devices increases as today's applications request always more services. However, the power consumption of systems-on-chip has significantly increased due to the high-density integration and the high leakage power of current
Externí odkaz:
https://doaj.org/article/aae3d87e9c57496eaa7e7cdca8f07a49
Autor:
Mehdi B. Tahoori, Guillaume Patrigeon, Guillaume Prenat, Lionel Torres, Rajendra Bishnoi, G. Di Pendina, Sophiane Senni, Pascal Benoit, Sarath Mohanachandran Nair
Publikováno v:
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
DATE 2020-23rd Design, Automation and Test in Europe Conference and Exhibition
DATE 2020-23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.394-399, ⟨10.23919/DATE48585.2020.9116321⟩
DATE
DATE 2020-23rd Design, Automation and Test in Europe Conference and Exhibition
DATE 2020-23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.394-399, ⟨10.23919/DATE48585.2020.9116321⟩
DATE
International audience; The goal of the GREAT RIA project is to cointegrate multiple functions like sensors ("Sensing"), RF emitters or receivers ("Communicating") and logic/memory ("Processing/Storing") together within CMOS technology by adapting th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1e2d69e280c4eeb67ddc3a8e3ff3f170
https://hal.science/hal-03753403
https://hal.science/hal-03753403
Autor:
Thierry Gil, Loic Dalmasso, Florent Bruguier, Pascal Benoit, Guillaume Patrigeon, Lionel Torres
Publikováno v:
ReCoSoC 2019-14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip
ReCoSoC 2019-14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, Jul 2019, York, United Kingdom. pp.51-58, ⟨10.1109/ReCoSoC48741.2019.9034961⟩
ReCoSoC
14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019)
14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019), Jul 2019, York, United Kingdom. pp.51-58, ⟨10.1109/ReCoSoC48741.2019.9034961⟩
ReCoSoC 2019-14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, Jul 2019, York, United Kingdom. pp.51-58, ⟨10.1109/ReCoSoC48741.2019.9034961⟩
ReCoSoC
14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019)
14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC 2019), Jul 2019, York, United Kingdom. pp.51-58, ⟨10.1109/ReCoSoC48741.2019.9034961⟩
International audience; The Internet of Things is a promise of smarter technologies, with devices working together in a distributed manner, to provide more quality of service in many domains, such as industry, transports, energy, health, etc. Fog/Edg
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ff07a3d4dd6c8326b85e8448df926bc2
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02499157
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02499157
Publikováno v:
IEEE Sensors Applications Symposium
SAS: Sensors Applications Symposium
SAS: Sensors Applications Symposium, Mar 2019, Sophia Antipolis, France
SAS
SAS: Sensors Applications Symposium
SAS: Sensors Applications Symposium, Mar 2019, Sophia Antipolis, France
SAS
International audience; Accurate evaluation of Ultra Low Power Systems on Chip (ULP SoC) is a huge challenge for designers and developers. In embedded applications, especially for Internet of Things end-node devices, ULP SoCs have to interact with th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a11a5e56d622295434d6617d15a97543
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02079509
https://hal-lirmm.ccsd.cnrs.fr/lirmm-02079509
Autor:
Jad Modad, Pascal Benoit, Sophiane Senni, Guillaume Prenat, Kaan Sevin, Gregory Di Pendina, Francois Duhem, Guillaume Patrigeon, Pascal Nouet, Frederic Ouattara, Lionel Torres
Publikováno v:
VLSI-SoC
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
2018 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018)
IFIP International Conference on Very Large Scale Integration (VLSI-SoC 2018), Oct 2018, Verona, Italy. pp.188-191, ⟨10.1109/VLSI-SoC.2018.8644875⟩
International audience; "Beyond CMOS" is today one of the major research directions in semiconductor industries to address current integrated circuit issues. Many alternative technologies are currently under investigation to deal with the scaling lim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::927a4d1156f9d4b718a5e81be6c2571d
https://doi.org/10.1109/vlsi-soc.2018.8644875
https://doi.org/10.1109/vlsi-soc.2018.8644875
Publikováno v:
PATMOS
2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
28th International Symposium on Power and Timing Modeling, Optimization and Simulation
PATMOS: Power and Timing Modeling, Optimization and Simulation
PATMOS: Power and Timing Modeling, Optimization and Simulation, Jul 2018, Platja d'Aro, Spain. pp.123-128, ⟨10.1109/PATMOS.2018.8464173⟩
2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)
28th International Symposium on Power and Timing Modeling, Optimization and Simulation
PATMOS: Power and Timing Modeling, Optimization and Simulation
PATMOS: Power and Timing Modeling, Optimization and Simulation, Jul 2018, Platja d'Aro, Spain. pp.123-128, ⟨10.1109/PATMOS.2018.8464173⟩
International audience; Accurate evaluation of Ultra Low Power Systems on Chip (ULP SoC) is a huge challenge for designers and developers. In embedded applications, especially for Internet of Things end-node devices, ULP SoCs have to interact with th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b1baa665cc0c6aa21dd4bff46cc2e7d3
https://doi.org/10.1109/patmos.2018.8464173
https://doi.org/10.1109/patmos.2018.8464173
Publikováno v:
IEEE/ACM International Conference on Nanoscale Architectures
NANOARCH: Nanoscale Architectures
NANOARCH: Nanoscale Architectures, Jul 2017, Newport, United States. pp.39-44, ⟨10.1109/NANOARCH.2017.8053704⟩
NANOARCH
2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
NANOARCH: Nanoscale Architectures
NANOARCH: Nanoscale Architectures, Jul 2017, Newport, United States. pp.39-44, ⟨10.1109/NANOARCH.2017.8053704⟩
NANOARCH
2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
International audience; Memories are currently a real bottleneck to design high speed and energy-efficient systems-on-chip. A significant increase of the performance gap between processors and memories is observed. On the other hand, an important pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::90afca4bc46aad987dfbfdc5ca150450
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01548938
https://hal-lirmm.ccsd.cnrs.fr/lirmm-01548938