Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Gudrun Innertsberger"'
Autor:
A. Grassl, Alexander Olbrich, Alexander Gschwandtner, B. Yuwono, W. H. Kraustchneider, Gudrun Innertsberger, T. Schloesser
Publikováno v:
Microelectronic Engineering. 48:51-54
The scaled-down MOSFETs of the 16 Gbit generation and beyond will require a gate dielectric thickness less than 2 nm. Reliability of ultra thin dielectrics were investigated in DC and AC stress at room and elevated temperatures.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::98b8a82a2a769238daf19f9da95502d6
https://doi.org/10.1016/s0167-9317(99)00336-6
https://doi.org/10.1016/s0167-9317(99)00336-6
Publikováno v:
Microelectronic Engineering. 48:147-150
The static C-V characteristics allows to separate interface traps and slow traps in MOS systems after high field injection stress. A procedure is developed to deduce the spatial distribution of rechargeable traps in the gate dielectric. The method is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1a3577fc639185ffe08f6c94500a378
https://doi.org/10.1016/s0167-9317(99)00358-5
https://doi.org/10.1016/s0167-9317(99)00358-5
Autor:
Udo Schwalke, Gudrun Innertsberger, Christian Gruensfelder, Martin Kerber, Alexander Gschwandtner
Publikováno v:
MRS Proceedings. 567
We have realized direct-tunneling gate oxide (1.6nm) NMOS and PMOS transistors by means of through-the-gate-implantation in a comer parasitics-free shallow-trench-isolation CMOS technology. In order to take full advantage of in-situ cluster-tool proc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03dfc9918459d83dde9fe949743091c3
https://doi.org/10.1557/proc-567-597
https://doi.org/10.1557/proc-567-597
Autor:
Alexander Gschwandtner, R. Kakoschke, J. Felsner, Gudrun Innertsberger, B. Yuwono, R. Jurk, W. Krautschneider, T. Schlösser
Publikováno v:
MRS Proceedings. 567
The influence of Vapor Phase Precleans leads to a different controllable fluorine content within the subsequently grown dielectric. The influence of the clean is discussed for non-volatile memory devices, advanced MOS transistors and ultra thin gate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::622c1719529a9fa91fdf24d3089cc983
https://doi.org/10.1557/proc-567-589
https://doi.org/10.1557/proc-567-589