Zobrazeno 1 - 10
of 69
pro vyhledávání: '"Gracieli Posser"'
Autor:
Gracieli Posser
Publikováno v:
Proceedings of the 2022 International Symposium on Physical Design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d74754cf1f3f6e2b6694c030609a8827
https://doi.org/10.1145/3531648
https://doi.org/10.1145/3531648
Publikováno v:
Proceedings of the 2022 International Symposium on Physical Design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d4ca7a6357b95ffb829e0fcf56f32488
https://doi.org/10.1145/3505170.3511477
https://doi.org/10.1145/3505170.3511477
Autor:
Gracieli Posser
Publikováno v:
Proceedings of the 2021 International Symposium on Physical Design.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::58d881532288b75e4c49f4677dabf978
https://doi.org/10.1145/3457136
https://doi.org/10.1145/3457136
Publikováno v:
ISPD
Detailed routing becomes the most complicated and runtime consuming stage in the physical design flow as technology nodes advance. Due to the inaccessibility of advanced routing rules and industrial designs, it is hard to conduct detailed routing aca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c6b9c76b9cbbc021d4e6664002410534
https://doi.org/10.1145/3299902.3311067
https://doi.org/10.1145/3299902.3311067
Publikováno v:
ISPD
In advanced technology nodes, detailed routing becomes the most complicated and runtime consuming stage. To spur detailed routing research, ISPD 2018 initial detailed routing contest is hosted and it is the first ISPD contest on detailed routing prob
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a7195d337164e4e1296e051ce1b4824f
https://doi.org/10.1145/3177540.3177562
https://doi.org/10.1145/3177540.3177562
This book describes new and effective methodologies for modeling, analyzing and mitigating cell-internal signal electromigration in nanoCMOS, with significant circuit lifetime improvements and no impact on performance, area and power. The authors are
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33:546-557
This paper presents a fast and effective approach to gate-version selection and threshold voltage, Vth, assignment. In the proposed flow, first, a solution without slew and load violation is generated. Then, a Lagrangian Relaxation (LR) method is use
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d689e03b1303ffff719ec2a9a220befa
https://doi.org/10.1109/tcad.2014.2305847
https://doi.org/10.1109/tcad.2014.2305847
Publikováno v:
Electromigration Inside Logic Cells ISBN: 9783319488981
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::71ac639f3d8efde8d0112528798bd69f
https://doi.org/10.1007/978-3-319-48899-8_5
https://doi.org/10.1007/978-3-319-48899-8_5
Publikováno v:
Electromigration Inside Logic Cells ISBN: 9783319488981
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a10a54dd58f7cc8054ab90a13c84a9d1
https://doi.org/10.1007/978-3-319-48899-8_1
https://doi.org/10.1007/978-3-319-48899-8_1