Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Gowri Kamarthy"'
Autor:
Meihua Shen, Thorsten Lill, John Hoang, Hao Chi, Aaron Routzahn, Jonathan Church, Pramod Subramonium, Ragesh Puthenkovilakam, Sirish Reddy, Sonal Bhadauriya, Sloan Roberts, Gowri Kamarthy
Publikováno v:
Japanese Journal of Applied Physics. 62:SI0801
High aspect ratio (HAR) silicon nitride and silicon oxide (ONON) channel hole patterning in 3D NAND flash presents great challenges. This report summarizes some of the recent progress in patterning from the perspective of HAR etching and deposition-e
Autor:
Meihua Shen, John Hoang, Hao Chi, Aaron Routzahn, Jonathan Church, Pramod Subramonium Subramonium, Ragesh Puthenkovilakam, Sirish Reddy Reddy, Sonal Bhadauriya, Sloan Roberts, Thorsten Lill, Gowri Kamarthy
Publikováno v:
ECS Meeting Abstracts. :869-869
Over the past decade, the demands for 3D NAND flash memory devices have been increased tremendously due to ever growing digital economics in consumer electronics, data centers, IOT, healthcare and automotive industries. The growth is further accelera
Publikováno v:
Extreme Ultraviolet (EUV) Lithography XII.
EUV exposure stochastics remains a key limiter in driving lower dose and better economics for scaling EUV patterning implementation. In particular, the stochastics translates to resist defects that become detrimental to device performance and yield.
A Hybrid Dry-Wet Approach for Removal of a Dummy Polysilicon Gate in a Replacement Metal Gate Scheme
Autor:
Weien Huang, Kai Dong Xu, Guang Yaw Hwang, Autumn Yeh, Mark Lin, David Lou, Gowri Kamarthy, S.F. Tzou, J.H. Liao, Eason Chen, Amulya Athayde
Publikováno v:
Solid State Phenomena. 187:57-60
Beginning at the 45nm node, the semiconductor industry is moving to high-k gate dielectrics and metal gate electrodes for CMOS logic devices [. Although different approaches of building these devices are being pursued, most of the industry has consol
Autor:
Meihua Shen, Richard A. Gottscho, Gowri Kamarthy, Vahid Vahedi, Samantha Tan, Thorsten Lill, Keren J. Kanarik, Yoshie Kimura, Jeffrey Marks
Publikováno v:
SPIE Proceedings.
Relentless scaling of advanced integrated devices drives feature dimensions towards values which can be expressed in small multiples of the lattice spacing of silicon. One of the consequences of dealing with features on such an atomic scale is that s
Autor:
S. Tan, Reza Arghavani, Aaron Thean, K. Mikhaylich, Johan Vertommen, Jen-Kan Yu, Ts. Ivanov, David Hellin, Vahid Vahedi, D. Lin, Hugo Bender, Y. Kimura, Nadine Collaert, Gowri Kamarthy, J. Geypen, Ali Pourghaderi, J. Marks
Publikováno v:
Extended Abstracts of the 2013 International Conference on Solid State Devices and Materials.
Publikováno v:
2012 12th International Workshop on Junction Technology.
Today no insurmountable obstacles are foreseen inhibiting scaling logic devices to the 10nm node. Cost effective processes and equipment sets have been developed that allow both 3-D Tri-Gate and Ultra-Thin Body SOI integration schemes to be scaled. T
Autor:
Jen-Kan Yu, Johan Vertommen, Tsvetan Ivanov, Yoshie Kimura, Dennis Lin, Aaron Thean, Nadine Collaert, Jeffrey Geypen, Reza Arghavani, Hugo Bender, Mohammad Ali Pourghaderi, Jef Marks, Samantha Tan, David Hellin, Vahid Vahedi, Gowri Kamarthy
Publikováno v:
Japanese Journal of Applied Physics. 53:04EC20
The onset of the 22 nm node introduced three dimensional tri-gate transistors into high-volume manufacturing for improved electrostatics. The next generations of fin nMOSFETs are predicted to be InGaAs based. Due to the ternary nature of InGaAs, stoi