Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Gopi Neela"'
Autor:
Sreenivas Subramoney, Hong Wang, Belliappa Kuttanna, Eagle Jones, Jim Radford, Gopi Neela, Biji George, Srivatsava Jandhyala, Omer Om J, Dipan Kumar Mandal, Kalsi Gurpreet S, Santhosh Kumar Rethinagiri, Lance Hacking
Publikováno v:
DATE
Visual Inertial Odometry (VIO) is used for estimating pose and trajectory of a system and is a foundational requirement in many emerging applications like AR/VR, autonomous navigation in cars, drones and robots. In this paper, we analyze key compute
Autor:
Gopi Neela, Jeffrey Draper
Publikováno v:
3DIC
Diminishing returns from transistor scaling, increasing interconnect delay, and the need for high device density and high energy efficiency are pushing the semiconductor industry in the direction of 3-dimensional integrated circuits (3DICs). In a 3DI
Autor:
Gopi Neela, Jeffrey Draper
Publikováno v:
MWSCAS
Modeling the Impact of TSVs on Average Wire Length in 3DICs Using a Tier-Level Hierarchical Approach
Autor:
Jeffrey Draper, Gopi Neela
Publikováno v:
ISVLSI
In a 3-dimensional integrated circuit (3DIC) the active tiers are interconnected using top-metal layer micro-bumps or through-silicon-vias (TSVs). The active area occupied by a TSV is typically several times larger than that of a gate and cannot be i
Autor:
Jeffrey Draper, Gopi Neela
Publikováno v:
ISCAS
Autor:
Jeffrey Draper, Gopi Neela
Publikováno v:
3DIC
Sustaining the trend of integration and energy efficiency, while remaining cost-effective, in the era of slower transistor scaling requires a new solution. Perhaps 3-dimensional integrated circuits (3DIC) are the best current solution to the physical
Autor:
Jeffrey Draper, Gopi Neela
Publikováno v:
ACM Great Lakes Symposium on VLSI
Decades of research in optimizing multipliers for power, speed, and area efficiency, and the continuing push for further enhancing multipliers reflects their importance. Energy-efficient computing requires optimization of every single logic component
Autor:
Jeffrey Draper, Gopi Neela
Publikováno v:
ISCAS
Diminishing returns from transistor scaling, increasing interconnect delay, and the need for high device density and high energy efficiency are pushing the semiconductor industry in the direction of 3-dimensional integrated circuits (3DICs). A homoge
Autor:
Gopi Neela, Jeffrey Draper
Publikováno v:
MWSCAS
3D chip stacking technology has been gaining traction in recent years, as academia and industry are showing greater interest in going vertical. However, most research so far has been limited to theoretical analysis due to lack of industry-standard CA