Zobrazeno 1 - 10
of 48
pro vyhledávání: '"Giovanni Ansaloni"'
Publikováno v:
Micromachines, Vol 13, Iss 7, p 1143 (2022)
Previous studies have demonstrated that, up to a certain degree, Convolutional Neural Networks (CNNs) can tolerate arithmetic approximations. Nonetheless, perturbations must be applied judiciously, to constrain their impact on accuracy. This is a cha
Externí odkaz:
https://doaj.org/article/1cd9d5fa0cd64d688f45d154499eccf2
Publikováno v:
Sensors, Vol 14, Iss 12, Pp 22532-22551 (2014)
Smart Wireless Body Sensor Nodes (WBSNs) are a novel class of unobtrusive, battery-powered devices allowing the continuous monitoring and real-time interpretation of a subject’s bio-signals, such as the electrocardiogram (ECG). These low-power plat
Externí odkaz:
https://doaj.org/article/cb45bb06b8c648b5b674def760765df4
Autor:
Halima Najibi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Miroslav Vasic, David Atienza
Publikováno v:
Transactions on Computer-Aided Design of Integrated Circuits and Systems
Flow cell arrays (FCAs) concurrently provide efficient on-chip liquid cooling and electrochemical power generation. This technology is especially promising for three-dimensional multi-processor systems-on-chip (3D MPSoCs) realized in deeply scaled te
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4fb507b045ce001428095c944b60d2b8
https://doi.org/10.1109/tcad.2022.3168257
https://doi.org/10.1109/tcad.2022.3168257
Autor:
Flavio Ponzina, Simone Machetti, Marco Rios, Benoit Walter Denkinger, Alexandre Levisse, Giovanni Ansaloni, Miguel Peon-Quiros, David Atienza
Publikováno v:
IEEE Micro
The growing popularity of edgeAI requires novel solutions to support the deployment of compute-intense algorithms in embedded devices. In this article, we advocate for a holistic approach, where application-level transformations are jointly conceived
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3a34e58d26f03c6d71785372dc94e8ea
https://doi.org/10.1109/mm.2022.3195617
https://doi.org/10.1109/mm.2022.3195617
Autor:
Rafael Medina, Joshua Kein, Giovanni Ansaloni, Marina Zapater, Sergi Abadal, Eduard Alarcón, David Atienza
Publikováno v:
Proceedings of the 28th Asia and South Pacific Design Automation Conference.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d0cbe762434e20c3a7f6173ce3134eca
https://doi.org/10.1145/3566097.3567952
https://doi.org/10.1145/3566097.3567952
Autor:
David Atienza Alonso, Alexandre Levisse, Marco Antonio Rios, Giovanni Ansaloni, Flavio Ponzina
By supporting the access of multiple memory words at the same time, Bit-line Computing (BC) architectures allow the parallel execution of bit-wise operations in-memory. At the array periphery, arithmetic operations are then derived with little additi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b6ad333955115ca47d6261c74cb1aec5
http://arxiv.org/abs/2209.06108
http://arxiv.org/abs/2209.06108
Publikováno v:
IEEE Transactions on Emerging Topics in Computing. 9:35-43
High Level Synthesis (HLS) frameworks allow to describe hardware designs in a high-level language (C/C++), without burdening developers with the error-prone task of specifying their implementation in detail. The HLS process is usually controlled by u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd15b821e8c843cb051d435ebfa00608
https://doi.org/10.1109/tetc.2018.2794068
https://doi.org/10.1109/tetc.2018.2794068
Autor:
Jihye Kwon, Luca P. Carloni, Giuseppe Di Guglielmo, Giovanni Ansaloni, Laura Pozzi, Lorenzo Ferretti
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39:3736-3747
High-Level Synthesis (HLS) tools allow the generation of a large variety of hardware implementations from the same specification by setting different optimization directives. Each combination of HLS directives returns an implementation of the target
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::76260d8a3cc189255f99255ba429e2d0
https://doi.org/10.1109/tcad.2020.3012750
https://doi.org/10.1109/tcad.2020.3012750
Publikováno v:
Great Lakes Symposium on VLSI
Proceedings of the Great Lakes Symposium on VLSI 2022
Proceedings of the Great Lakes Symposium on VLSI 2022
Flow Cell Arrays (FCA) technology employs microchannels filled with an electrolytic fluid to concurrently provide cooling and power generation to integrated circuits (ICs). This solution is particularly appealing for Three-Dimensional Multi-Processor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d1af86afbdb6798c0ce5f72bdd7601bd
Autor:
William Andrew Simon, Giovanni Ansaloni, Alexandre Levisse, Marina Zapater, David Atienza, Valerian Ray
Publikováno v:
DAC
Edge devices must support computationally demanding algorithms, such as neural networks, within tight area/energy budgets. While approximate computing may alleviate these constraints, limiting induced errors remains an open challenge. In this paper,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4239aa0874a727adb1f8f1062b2528f2
https://doi.org/10.1109/dac18074.2021.9586245
https://doi.org/10.1109/dac18074.2021.9586245