Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Giovanni, Marzin"'
Autor:
Reza Monir Vaghefi, Ramesh Chembil Palat, Giovanni Marzin, Kiran Basavaraju, Yiping Feng, Mihai Banu
Publikováno v:
IEEE Access, Vol 8, Pp 152680-152696 (2020)
Full-dimension MIMO (FD-MIMO) using planar active antenna systems (AAS) is considered a critical technology for fifth-generation (5G) cellular systems to improve network capacity. An AAS is typically subject to hardware impairments that negatively im
Externí odkaz:
https://doaj.org/article/5cab05f734f44be59c843e94b53bc06b
Autor:
Kiran Basavaraju, Ramesh Chembil Palat, Giovanni Marzin, Yiping Feng, Reza Monir Vaghefi, Mihai Banu
Publikováno v:
IEEE Access, Vol 8, Pp 152680-152696 (2020)
Massive MIMO has been the subject of intense interest in both academia and industry for the past few years. 3GPP standardization for cellular systems have adopted the principles of massive MIMO and categorized the use of large rectangular planar arra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d97c96b1bf71726fe49511b1932c98db
http://arxiv.org/abs/1909.08003
http://arxiv.org/abs/1909.08003
Autor:
Chris Ng, Reza Monir Vaghefi, Glenston Miranda, Ramesh Chembil Palat, Rakesh Srirambhatla, Sanjeev Tarigopula, Giovanni Marzin, Mihai Banu, Farid Fayazbakhsh
Publikováno v:
5G World Forum
Massive multiple-input and multiple-output (MIMO) has been the subject of interest in both industry and academia for the past few years. Massive MIMO refers to the use of a large number of antennas typically at the base station (BS) to serve multiple
Autor:
Andrea Fenaroli, Salvatore Levantino, Giovanni Marzin, Andrea L. Lacaita, Carlo Samori, Giovanni Marucci
Publikováno v:
IEEE Journal of Solid-State Circuits. 50:2678-2691
Although multiplying delay-locked loops allow clock frequency multiplication with very low phase noise and jitter, their application has been so far limited to integer-N multiplication, and the achieved reference-spur performance has been typically l
Publikováno v:
IEEE Journal of Solid-State Circuits. 49:1762-1772
Digital fractional-N phase-locked loops (PLLs) are an attractive alternative to analog PLLs in the design of frequency synthesizers for wireless applications. However, the main obstacle to their full acceptance in the wireless-systems arena is their
Autor:
Giovanni Marzin, Davide Tasca, Salvatore Levantino, Marco Zanuso, Carlo Samori, Andrea L. Lacaita
Publikováno v:
ISSCC
This paper introduces a ΔΣ fractional-N digital PLL based on a single-bit TDC. A digital-to-time converter, placed in the feedback path, cancels out the quantization noise introduced by the dithering of the frequency divider modulus and permits to
Publikováno v:
ISSCC
The bandwidth of a phased-locked loop (PLL) is dependent on several analog parameters that are subject to process, temperature and voltage spreads, as well as to variations along the frequency-tuning range. Even in digital PLLs, which rely on a digit
Autor:
Giovanni Marzin, Andrea Fenaroli, Giovanni Marucci, Andrea L. Lacaita, Carlo Samori, Salvatore Levantino
Publikováno v:
ISSCC
The introduction of inductorless frequency synthesizers into standardized wireless systems still requires a high level of innovation in order to achieve the stringent requirements of low noise and low power consumption. Synthesizers based on the so-c