Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Giorgiomaria Cicero"'
Autor:
Alessandro Biondi, Daniel Casini, Giorgiomaria Cicero, Niccolo Borgioli, Giorgio Buttazzo, Gaetano Patti, Luca Leonardi, Lucia Lo Bello, Marco Solieri, Paolo Burgio, Ignacio Sanudo Olmedo, Angelo Ruocco, Luca Palazzi, Marko Bertogna, Alessandro Cilardo, Nicola Mazzocca, Antonino Mazzeo
Publikováno v:
IEEE Access, Vol 9, Pp 75446-75459 (2021)
This paper presents SPHERE, a project aimed at the realization of an integrated framework to abstract the hardware complexity of interconnected, modern system-on-chips (SoC) and simplify the management of their heterogeneous computational resources.
Externí odkaz:
https://doaj.org/article/9d75e74581dc412a8422c359e082125b
Autor:
Niccolo Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio Buttazzo
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 41:4469-4480
Publikováno v:
IEEE Embedded Systems Letters. 12:78-82
In the last decade, deep learning techniques reached human-level performance in several specific tasks as image recognition, object detection, and adaptive control. For this reason, deep learning is being seriously considered by the industry to addre
Autor:
Daniel Casini, Luca Belluardo, Andrea Stevanato, Giorgiomaria Cicero, Giorgio Buttazzo, Alessandro Biondi
Publikováno v:
RTCSA
This work aims at making Apollo, a popular autonomous driving framework, safer and more secure by designing a multi-domain architecture, where its components are split between a feature-rich domain running Linux and a critical domain running a real-t
Autor:
Gaetano Patti, Alessandro Cilardo, Luca Leonardi, Lucia Lo Bello, Marko Bertogna, Nicola Mazzocca, Daniel Casini, Marco Solieri, Giorgio Buttazzo, Giorgiomaria Cicero, Ignacio Sanudo Olmedo, Niccolo Borgioli, Alessandro Biondi, Paolo Burgio, Angelo Ruocco, Antonino Mazzeo, Luca Palazzi
Publikováno v:
IEEE Access, Vol 9, Pp 75446-75459 (2021)
This paper presents SPHERE, a project aimed at the realization of an integrated framework to abstract the hardware complexity of interconnected, modern system-on-chips (SoC) and simplify the management of their heterogeneous computational resources.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6bab7a1a8c414c1a53c576a5cc7e8712
http://hdl.handle.net/20.500.11769/511436
http://hdl.handle.net/20.500.11769/511436
AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC
Autor:
Alessandro Biondi, Francesco Restuccia, Mauro Marinoni, Giorgio Buttazzo, Giorgiomaria Cicero
Publikováno v:
DAC
FPGA-based system-on-chips (SoC) are powerful computing platforms to implement mixed-criticality systems that require both multiprocessing and hardware acceleration. Virtualization via hypervisor technologies is, de-facto, an effective technique to a
Publikováno v:
ICIT
This paper proposes a novel design to enable the virtualization of both secure and non-secure worlds offered by ARM platforms with TrustZone technology. The design is based on a dual-hypervisor scheme that allows executing multiple two-world domains
Autor:
Alessandro Frigerio, G. M. Guidi, D. Di Prizio, Sauro Filippeschi, Marco Marengo, Pietro Nannipieri, Giorgiomaria Cicero, S. Fontanesi, P. Di Marco, S. Piacquadio, Luca Fanucci, Mauro Mameli, N. Morganti, G. Becatti, Miriam Manzoni, F. Belfi, G. Orlandini, M. Rognini, F. Creatini, Federico Baronti, Davide Fioriti
Publikováno v:
Journal of Physics: Conference Series. 655:012042
Two Closed Loop Pulsating Heat Pipes (CLPHPs) are tested on board REXUS 18 sounding rocket in order to obtain data over a relatively long microgravity period (approximately 90 s). The CLPHPs are partially filled with FC-72 and have, respectively, an