Zobrazeno 1 - 10
of 122
pro vyhledávání: '"Gilbert, Barry K."'
This paper presents a power distribution network (PDN) decoupling capacitor optimization application with three primary goals: reduction of solution times for large networks, development of flexible network scoring routines, and a concentration stric
Externí odkaz:
http://arxiv.org/abs/2305.01540
Coding schemes are often used in high-speed processor-processor or processor-memory busses in digital systems. In particular, we have introduced (in a 2012 DesignCon paper) a zero sum (ZS) signaling method which uses balanced or nearly-balanced codin
Externí odkaz:
http://arxiv.org/abs/2304.13497
Autor:
Degerstrom, Michael J., Smutzer, Chad M., Ericson, Richard B., Haider, Clifton R, Gilbert, Barry K.
An earlier study of a high layer-count test board using plated-through-hole (PTH) vias and a limited quantity of laser vias was shown to be capable of supporting 112 Gb/s PAM-4 links (or equivalent signaling having 28 GHz (Nyquist) bandwidth). This o
Externí odkaz:
http://arxiv.org/abs/2304.01913
The traditional SerDes link simulation process begins with the extraction of printed circuit board (PCB) physical stripline and via models, followed by channel modeling and link simulation. We invert this simulation flow by first creating link perfor
Externí odkaz:
http://arxiv.org/abs/2304.01911
Although next generation (>28 Gbps) SerDes standards have been contemplated for several years, it has not been clear whether PCB structures supporting 56 Gbps NRZ will be feasible and practical. In this paper, we assess a number of specific PCB desig
Externí odkaz:
http://arxiv.org/abs/2304.01909
Autor:
Smutzer, Chad M., Techentin, Robert W., Degerstrom, Michael J., Gilbert, Barry K., Daniel, Erik S.
Complex digital systems such as high performance computers (HPCs) make extensive use of high-speed electrical interconnects, in routing signals among processing elements, or between processing elements and memory. Despite increases in serializer/dese
Externí odkaz:
http://arxiv.org/abs/2302.05427
As ASIC supply voltages approach one volt, the source-impedance goals for power distribution networks are driven ever lower as well. One approach to achieving these goals is to add decoupling capacitors of various values until the desired impedance p
Externí odkaz:
http://arxiv.org/abs/2301.09580
It is notoriously difficult to measure instantaneous supply current to a device such as an ASIC, FPGA, or CPU without also affecting the instantaneous supply voltage and compromising the operation of the device [21]. For decades designers have relied
Externí odkaz:
http://arxiv.org/abs/2301.10237
Autor:
McCoy, Bart O., Techentin, Robert W., Buhrow, Benjamin R., Buchs, Kevin, Lin, How, Gilbert, Barry K., Daniel, Erik S.
Variability analysis is important in successfully deploying multi-gigabit backplane printed wiring boards (PWBs) with growing numbers of high-speed SerDes links. We discuss the need for large sample sizes to obtain accurate variability estimates of S
Externí odkaz:
http://arxiv.org/abs/2301.10176
High performance computing (HPC) systems make extensive use of high speed electrical interconnects, in routing signals among processing elements, or between processing elements and memory. Increasing bandwidth demands result in high density, parallel
Externí odkaz:
http://arxiv.org/abs/2301.10170