Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Gi-Ho Cha"'
Publikováno v:
The Transactions of the Korean Institute of Electrical Engineers P. 64:97-103
To achieve the safety and reliability, RAMS activity for a railway signal system of Near Surface Transit is studied. In this paper, preliminary hazard analysis in RAMS activities is studied for the railway signal system of Near Surface Transit. Preli
Publikováno v:
Journal of the Korean society for railway. 15:42-47
Publikováno v:
2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595).
A Hall effect sensor using a 7 /spl mu/m, 1.7 /spl Omega/-cm bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes, to optimize offset voltage a
Autor:
Byoung Hun Lee, Gi-ho Cha, Kye-hee Yeom, Joon-hee Lee, Woo-Tag Kang, Yun-Gi Kim, Kyu-Charn Park, Sang-Cheol Lee, Chang-Gyu Hwang, Tae-Earn Shim, Duck-Hyung Lee, Sunil Yu, Sang-In Lee, Il-Kwon Kim
Publikováno v:
International Electron Devices Meeting. Technical Digest.
A fully planarized 16 Mb SOI DRAM has been successfully fabricated featuring pattern-bonded SOI (PBSOI), CMP processes, STI (Shallow Trench Isolation) and the silicon-on-capacitor (SOC) structure with 0.3 um technology using i-line lithography. The f
Publikováno v:
SPIE Proceedings.
Silicon direct bonding technique was successfully applied for the fabrication of high voltage IGBT (Insulated Gate Bipolar Transistor). In this work, 5 inch, p-type CZ wafer for handle wafer and n-type FZ wafer for device wafer were used and bonding
Autor:
Jingmin Leng, John J. Sidorowich, Byeong-Hoon Lee, Joo-Tae Moon, Gi-ho Cha, Y. D. Yoon, Sang-In Lee, Jon Opsal
Publikováno v:
SPIE Proceedings.
We developed a robust measurement recipe for six layer SOI film stack. Both spectrometer and BPR were combined to characterize the plate and storage polysilicons. A new global optimization method was developed to find the best solution in parameter s
Improvement of Photo-Misalignment in Patterned Wafer Bonding Process for Silicon-on-Insulator Device
Autor:
Gi–Ho Cha, Il-Kwon Kim, Moonyong Lee, Ki–Hong Lee, Geum–Jong Bae, Sang-In Lee, Kyung Wook Lee
Publikováno v:
Japanese Journal of Applied Physics. 38:3487
We have found that the photo-misalignment problem in patterned and bonded silicon-on-insulator (PBSOI) was closely related to the bonding process. We examined the stress effect on photo-misalignment using a vacuum bonding system. Photo-misalignment w
Publikováno v:
2002 23rd International Conference on Microelectronics. Proceedings (Cat. No.02TH8595); 2002, p273-273, 1p