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Publikováno v:
IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain. ⟨10.1109/ISCAS45731.2020.9180599⟩
ISCAS
HAL
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
IEEE International Symposium on Circuits and Systems (ISCAS), Oct 2020, Seville, Spain. ⟨10.1109/ISCAS45731.2020.9180599⟩
ISCAS
HAL
International audience; In this paper, we present a lightweight secured AES hardware implementation designed to further resist to Side Channel Attacks relying on Power Analysis. The proposed architecture is based on an 8-bit data-path, and the protec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fa6a74dc8d2a12b8b8d8b1db49446ff9
https://hal.archives-ouvertes.fr/hal-02511667
https://hal.archives-ouvertes.fr/hal-02511667