Zobrazeno 1 - 2
of 2
pro vyhledávání: '"Ghing-Hao Shaw"'
Autor:
M. Verghese, B. Roderer, L. Grant, V. Pathak, P. Begin, C. Kean, B. Vance, A. Bonelli, J. Ribo, Ghing-Hao Shaw, P. Smith, F. Bauduin, H. Mah, S. Devalapalli, O. Bonte
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
A 32/spl times/32 switch ASIC has 40 Gb/s aggregate throughput. The switch fabric is realized in three stages using full-custom clock recovery and transmit ports at 1.25 Gb/s. 18 ASICs fabricated in 0.18 /spl mu/m CMOS technology and packaged in 352-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e0afcd22ea2ea0aab444e27619ccd128
https://doi.org/10.1109/isscc.2001.912615
https://doi.org/10.1109/isscc.2001.912615
Autor:
Pathak, V., Ghing-Hao Shaw, Vance, B., Devalapalli, S., Smith, P., Bonelli, A., Ribo, J., Bonte, O., Bauduin, F., Roderer, B., Verghese, M., Grant, L., Mah, H., Kean, C., Begin, P.
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177); 2001, p226-227, 2p