Configurable XOR hash functions for banked scratchpad memories in GPUs

Autor: Gert-Jan van den Braak, Henk Corporaal, Juan Gómez-Luna, José María González-Linares, Nicolás Guil

Publikováno v: IEEE Transactions on Computers, 65(7):7271051, 2045-2058. IEEE Computer Society

Scratchpad memories in GPU architectures are employed as software-controlled caches to increase the effective GPU memory bandwidth. Through the use of well-known optimization techniques, such as privatization and tiling, they are properly exploited.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7345a639a25d3aaf324734b423d619c8
https://research.tue.nl/en/publications/31803300-6ff5-478c-ad32-04b634811d86

Adaptive and transparent cache bypassing for GPUs

Autor: Henk Corporaal, Gert-Jan van den Braak, Akash Kumar, Ang Li

Publikováno v: Proceedings of SC 2015: The International Conference for High Performance Computing, Networking, Storage and Analysis
SC

In the last decade, GPUs have emerged to be widely adopted for general-purpose applications. To capture on-chip locality for these applications, modern GPUs have integrated multilevel cache hierarchy, in an attempt to reduce the amount and latency of

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::29066b75be4b1a84a0658a003cdf9785
http://www.scopus.com/inward/record.url?scp=84966487021&partnerID=8YFLogxK

A detailed GPU cache model based on reuse distance theory

Autor: Henk Corporaal, Cedric Nugteren, Henri E. Bal, Gert-Jan van den Braak

Publikováno v: 20th IEEE Int. Symp. on High Performance Computer Architecture (HPCA-2014)
HPCA
Vrije Universiteit Amsterdam
Nugteren, C, van den Braak, G-J, Corporaal, H & Bal, H E 2014, A Detailed GPU Cache Model Based on Reuse Distance Theory . in 20th IEEE Int. Symp. on High Performance Computer Architecture (HPCA-2014) . IEEE CS .
Proceedings of the IEEE 20th International Symposium on High Performance Computer Architecture (HPCA), 15-19 February 2014, Orlando, Florida, 37-48
STARTPAGE=37;ENDPAGE=48;TITLE=Proceedings of the IEEE 20th International Symposium on High Performance Computer Architecture (HPCA), 15-19 February 2014, Orlando, Florida

As modern GPUs rely partly on their on-chip memories to counter the imminent off-chip memory wall, the efficient use of their caches has become important for performance and energy. However, optimising cache locality system-atically requires insight

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a8eb6190a206b467b499de9d7780695b
https://research.tue.nl/en/publications/66653e1d-2ce7-44ab-8543-744cd8fa4d3b

Future of GPGPU micro-architectural parameters

Autor: Cedric Nugteren, Gert-Jan van den Braak, Henk Corporaal

Publikováno v: Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 18-22 March 2013, Grenoble, France, 392-395
STARTPAGE=392;ENDPAGE=395;TITLE=Proceedings of Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, 18-22 March 2013, Grenoble, France

As graphics processing units (GPUs) are becoming increasingly popular for general purpose workloads (GPGPU), the question arises how such processors will evolve architecturally in the near future. In this work, we identify and discuss trade-offs for

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6fcf7c4788769264417dc74343e84e18
https://research.tue.nl/nl/publications/bc604950-258c-4d30-a092-a03e4da5dd8b