Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Gert Burbach"'
Autor:
Lutz Herrmann, Manfred Horstmann, M Greenlaw, B. Bayha, E. Ehrichs, Tilo Mantei, M. Herden, Thomas Feudel, Martin Gerhardt, Gert Burbach
Publikováno v:
ECS Transactions. 6:373-380
Process parameter fluctuations have a strong impact on functionality and performance of CMOS logic circuits and memory cells. Tight control of transistor gate length and final anneal temperature are equally important. We have developed a strategy to
Autor:
D. Greenlaw, Jon D. Cheek, Manfred Horstmann, Christoph Schwan, Markus Lenski, Peter Huebler, Scott Luning, R. van Bentum, N. Kepler, Matthias Schaller, James F. Buller, Hartmut Ruelke, Kai Frohberg, Gert Burbach, Rolf Stephan, J. Klais, S. Krishnan, Jörg Hohage, Andy Wei, Th. Feudel, Michael Raab, G. Grasshoff, Karsten Wieczorek, Martin Gerhardt
Publikováno v:
Materials Science and Engineering: B. :3-8
Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40 nm gate length (L GATE ) PD SOI t
Autor:
Sriramkumar Venugopalan, Vivek Joshi, Sriram Balasubramanian, Ralf van Bentum, Gert Burbach, Matthias Goldbach, Luis Zamudio
Publikováno v:
CICC
Our study breaks down the dependence of SRAM read current (Iread) variability (σIread) into constituting pass-gate (PG) and pull down (PD) NMOS transistor variability. We report a bottoms-up model for σIread including feedback in stacked transistor
Autor:
Andre Holfeld, Jens Busch, Rolf Seltmann, Francois Weisbuch, Gert Burbach, Anne Parge, Andre Poock, Tino Hertzsch
Publikováno v:
25th European Mask and Lithography Conference.
Within our paper we are going to discuss the variation within the patterning process in the context of the overall electrical parameter variation in an advanced logic Fab. The evaluation is based on both the variation of ring oscillators that are dis
Publikováno v:
SPIE Proceedings.
SRAM stability has been an important topic for the high performance microprocessor industry. There are a several reasons why SRAMs are most susceptible to both process-induced variations and electrical parameter variability. Because the cache cells u
Publikováno v:
2005 IEEE International SOI Conference Proceedings.
In this work, we describe novel self-aligned diode and resistor structures and their process integration into an advanced 90nm SOI technology. Their superior device characteristics over conventional device structures built within the SOI film is desc
Autor:
A. Hellmich, S. Weiher-Telford, C. Ziemer-Popp, Th. Feudel, H.-J. Engelmann, Guido Koerner, A. Wei, Rolf Stephan, O. Herzog, K. Hempel, Jens-Peter Biethan, C. Reichel, J. Hontschel, Helmut Bierstedt, Peter Javorka, A. Neu, J. Klais, E. Sanchez, T. Mantei, M. Horstmann, D. Greenlaw, O. Luckner, P.-O. Hansson, N. Kepler, Michael Raab, Markus Lenski, Bernhard Trui, A. Samoilov, Christoph Schwan, Ralf Otterbach, Thorsten Kammler, Gert Burbach
Publikováno v:
Extended Abstracts of the 2005 International Conference on Solid State Devices and Materials.
Autor:
D. Greenlaw, Rolf Stephan, James F. Buller, Jon D. Cheek, Michael Raab, Christoph Schwan, Markus Lenski, N. Kepler, Karsten Wieczorek, Martin Gerhardt, Gert Burbach, Thomas Feudel, Jörg Hohage, Kai Frohberg, Andy Wei, J. Klais, S. Krishnan, Scott Luning, Peter Huebler, Matthias Schaller, Manfred Horstmann, G. Grasshoff, R. van Bentum, Hartmut Ruelke
Publikováno v:
2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866).
Partial depleted (PD) SOI technologies have reached maturity for production of high speed, low power microprocessors. The paper will highlight several challenges found during the course of development for bringing 40nm gate length (L/sub GATE/) PD SO
Autor:
R. Kirsch, Gunter Grasshoff, Peter Huebler, Falk Graetsch, Thomas Feudel, Thomas Werner, Stephan Kruegel, Holger Schuehrer, Thomas Heller, Hartmut Ruelke, Karsten Wieczorek, Rolf Stephan, Michael Raab, Kai Frohberg, E. Langer, A. Pawlowitsch, Carsten Hartig, D. Greenlaw, Andy Wei, Gert Burbach, K. Hempel, Manfred Horstmann, Frank Feustel
Publikováno v:
IEEE International Electron Devices Meeting 2003.
SOI and low-k technologies are rapidly approaching production maturity. This paper highlights several challenges found when moving them from development to high-volume manufacturing. In overcoming these challenges in wafer processing and transistor d
Autor:
Darin Chan, Gert Burbach, C. Lee, R. vanBentum, D. Greenlaw, A. Wei, Dong-Hyuk Ju, S. Krishnan, N. Kepler, Mario M. Pelella, M. Fuselier, D. Wristers, C. Riccobenc, M. Lee, G. Hill, D. Wu, S. Chan, Ping Yeh, S. R. Sundararajan, W. Maszara, S. Sinha, William G. En, Olov Karlsson
Publikováno v:
2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).
The key performance advantages and challenges of SOI CMOS for ULSI applications are discussed in detail. Included is an insightful analysis comparing the performance benefits of SOI technologies over its bulk-Si counterpart. The hysteretic trends of