Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Gerald Strevig"'
Autor:
Rahul M. Rao, Christopher Gonzalez, Eric Fluhr, Abraham Mathews, Andrew Bianchi, Daniel Dreps, David Wolpert, Eric Lai, Gerald Strevig, Glen Wiedemeier, Philipp Salz, Ryan Kruse
Publikováno v:
2022 IEEE International Solid- State Circuits Conference (ISSCC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c570b2a385ceb478be65901f04346bf
https://doi.org/10.1109/isscc42614.2022.9731594
https://doi.org/10.1109/isscc42614.2022.9731594
Autor:
Ofer Geva, Brian Deskin, Gregory J. Fredeman, Mark Cichanowski, Adam R. Jatkowski, Brian Bell, John Isakson, Christopher J. Berry, Chris Cavitt, Giora Biran, Brandon Bruen, David H. Wolpert, Jesse Surprise, Dureseti Chidambarrao, Dina Hamid, Michael H. Wood, S. Carey, L. Sigal, Gerald Strevig, Drew Turner
Publikováno v:
IBM Journal of Research and Development. 64:8:1-8:12
The IBM Z processor continues to improve over previous System Z processors, but for the first time it does so without a technology improvement as the baseline enabler. The IBM z15 was designed in the same 14-nm High-Performance GLOBALFOUNDRIES techno
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::055f34e9caed632df1b94bf3f2f6723e
https://doi.org/10.1147/jrd.2020.3008099
https://doi.org/10.1147/jrd.2020.3008099
Autor:
Guenter Mayer, Thomas Strach, Yiu-Hing Chan, Gerard M. Salem, Ayan Datta, Doug Malone, David L. Rude, Adam R. Jatkowski, James D. Warnock, Donald W. Plass, Anne E. Gattiker, C-L Kevin Shum, Charles F. Webb, Jeffrey A. Zitz, Aditya Bansal, L. Sigal, Gerald Strevig, Pak-Kin Mak, Howard H. Smith, Ruchir Puri, S. Carey, Hubert Harrer, M. Mayo, Huajun Wen, Yuen Chan
Publikováno v:
IEEE Journal of Solid-State Circuits. 49:9-18
This work describes the circuit and physical design implementation of the processor chip (CP), level-4 cache chip (SC), and the multi-chip module at the heart of the EC12 system. The chips were implemented in IBM's high-performance 32nm high-k/metal-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4867c44fa93569f4d5652227a4408ac
https://doi.org/10.1109/jssc.2013.2284647
https://doi.org/10.1109/jssc.2013.2284647
Autor:
Yuen Chan, Matthew M. Ziegler, Bronson Tim, Tobias Werner, Frank Malgioglio, Charudhattan Nagarajan, S. Carey, Michael A. Blake, Mark Cichanowski, Donald W. Plass, Brian W. Curran, D. Malone, Jeffrey A. Zitz, Pak-Kin Mak, Michael G. Wood, James D. Warnock, Yiu-Hing Chan, Gregory J. Fredeman, John Isakson, Friedrich Schroeder, Christopher J. Berry, John Badar, L. Sigal, Gerald Strevig, Guenter Mayer, Ruchir Puri, M. Mayo, Dieter Wendel, Gerard M. Salem, Daniel M. Dreps, Ricardo H. Nigaglioni
Publikováno v:
ISSCC
The next-generation System z design introduces a new microprocessor chip (CP) and a system controller chip (SC) aimed at providing a substantial boost to maximum system capacity and performance compared to the previous zEC12 design in 32nm [1,2]. As
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22145c646a2415fdbc0c5107fd1e305a
https://doi.org/10.1109/isscc.2015.7062930
https://doi.org/10.1109/isscc.2015.7062930
Autor:
M. Mayo, Chung-Lung Shum, Huajun Wen, Guenter Mayer, Thomas Strach, D. Malone, Y.-H. Chan, James D. Warnock, S. Carey, L. Sigal, Gerald Strevig, Donald W. Plass, Ruchir Puri, Gerard M. Salem, Anne E. Gattiker, Yiu-Hing Chan, Aditya Bansal, Hubert Harrer, Ayan Datta, Adam R. Jatkowski, Charles F. Webb, Pak-Kin Mak, David L. Rude
Publikováno v:
ISSCC
The new System z microprocessor chip (“CP chip”) features a high-frequency processor core running at 5.5GHz in a 32nm high-κ CMOS technology [1], using 15 levels of metal. This chip is a successor to the 45nm product [2], with significant improv
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a87f23989edaffc22d46eaac0bad09b4
https://doi.org/10.1109/isscc.2013.6487630
https://doi.org/10.1109/isscc.2013.6487630
Autor:
Charudhattan Nagarajan, Sridhar H. Rangarajan, Y.H. Chan, John Badar, Y.-H. Chan, M. Mayo, S. Carey, Matt Ziegler, L. Sigal, Thomas Strach, Christopher J. Berry, Niels Fricke, Gerald Strevig, Jose L. Neves, Frank Malgioglio, Dieter Wendel, Donald W. Plass, Ruchir Puri, John Isakson, A. Aipperspach, D. Malone, Robert M. Averill, James D. Warnock, Gerard M. Salem, Friedrich Schroeder, K. Lind, Howard H. Smith, Michael H. Wood, Jesse Surprise, Ricardo H. Nigaglioni, Guenter Mayer, D. Phan
Publikováno v:
IBM Journal of Research and Development. 59:15:1-15:15
The two chips at the heart of the IBM z13™ system include a processor chip (referred to as the CP or Central Processor chip) and an L4 (Level 4) cache chip (referred to as the SC or System Controller chip), each 678 mm2 in area. The CP and SC chips
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::09bb51eed69b2b63a4c613096a7a250d
https://doi.org/10.1147/jrd.2015.2446871
https://doi.org/10.1147/jrd.2015.2446871
Autor:
DOMKE, JENS, VATAI, EMIL, GEROFI, BALAZS, YUETSU KODAMA, WAHIB, MOHAMED, PODOBAS, ARTUR, MITTAL, SPARSH, PERICÀS, MIQUEL, LINGQI ZHANG, PENG CHEN, DROZD, ALEKSANDR, SATOSHI MATSUOKA
Publikováno v:
ACM Transactions on Architecture & Code Optimization; Dec2023, Vol. 20 Issue 4, p1-26, 26p
Autor:
Warnock, James, Chan, Yuen, Harrer, Hubert, Carey, Sean, Salem, Gerard, Malone, Doug, Puri, Ruchir, Zitz, Jeffrey A., Jatkowski, Adam, Strevig, Gerald, Datta, Ayan, Gattiker, Anne, Bansal, Aditya, Mayer, Guenter, Chan, Yiu-Hing, Mayo, Mark, Rude, David L., Sigal, Leon, Strach, Thomas, Smith, Howard H.
Publikováno v:
IEEE Journal of Solid-State Circuits; Jan2014, Vol. 49 Issue 1, p9-18, 10p