Zobrazeno 1 - 2
of 2
pro vyhledávání: '"George Kranas"'
Publikováno v:
Information, Vol 13, Iss 5, p 212 (2022)
Standard-cell placement is the fundamental step in a typical VLSI/ASIC design flow. Its result, paired with the outcome of the routing procedure can be the decisive factor in rendering a design manufacturable. Global placement generates an optimized
Externí odkaz:
https://doaj.org/article/53aa9ef7457c47af8dcd61e3cf8ff4a6
Publikováno v:
25th Pan-Hellenic Conference on Informatics.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f9dc06c379b245889c410dc4b3f72070
https://doi.org/10.1145/3503823.3503849
https://doi.org/10.1145/3503823.3503849