Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Gengting Liu"'
Autor:
Andreas Dixius, Christian Mayr, Jim Garside, Stefan Scholze, Steve Furber, Felix Neumarker, Michael Hopkins, Johannes Partzsch, Marco Stolba, Florian Kelber, Dongwei Hu, Delong Shang, Mantas Mikaitis, David Clark, Stefan Schiefer, Gengting Liu, Sebastian Hoppner
Publikováno v:
Clark, D, Dixius, A, Furber, S, Garside, J, Hopkins, M, Höppner, S, Hu, D, Kelber, F, Liu, G, Mayr, C, Mikaitis, M, Neumärker, F, Partzsch, J, Schiefer, S, Scholze, S, Shang, D & Stolba, M 2020, Creating the Future . in S Furber & P Bogdan (eds), SpiNNaker : A Spiking Neural Network Architecture . Now Publishers Inc, Boston-Delft, pp. 266-284 . https://doi.org/10.1561/9781680836530.ch8
In this chapter, we take a look into the future of this technology. First we survey interesting developments in hardware accelerators for SNNs and ANNs, but then we focus primarily on the second-generation SpiNNaker developments. Here we will refer t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::861ec8994d16457c4377761db8b61944
https://doi.org/10.1561/9781680836530.ch8
https://doi.org/10.1561/9781680836530.ch8
Autor:
Marco Stolba, Delong Shang, Stefan Scholze, Stefan Schiefer, Johannes Partzsch, Felix Neumärker, Mantas Mikaitis, Christian Mayr, Gengting Liu, Florian Kelber, Dongwei Hu, Sebastian Höppner, Michael Hopkins, Jim Garside, Steve Furber, Andreas Dixius, Dave Clark
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7b0742d82e67cf0b8c8b6f22ba225db9
https://doi.org/10.1561/9781680836523.ch8
https://doi.org/10.1561/9781680836523.ch8
Autor:
Gengting Liu, David Lester, Mantas Mikaitis, Stefan Scholze, Steve Furber, Sebastian Hoppner, Delong Shang, Jim Garside, Andreas Dixius
Publikováno v:
ARITH
2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)
Mikaitis, M, Lester, D, Shang, D, Furber, S, Liu, G, Garside, J, Scholze, S, Hoppner, S & Dixius, A 2018, ' Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip ', Paper presented at 25th IEEE Symposium on Computer Arithmetic, 25/06/18-27/06/18 pp. 37-44 . https://doi.org/10.1109/ARITH.2018.8464785
2018 IEEE 25th Symposium on Computer Arithmetic (ARITH)
Mikaitis, M, Lester, D, Shang, D, Furber, S, Liu, G, Garside, J, Scholze, S, Hoppner, S & Dixius, A 2018, ' Approximate Fixed-Point Elementary Function Accelerator for the SpiNNaker-2 Neuromorphic Chip ', Paper presented at 25th IEEE Symposium on Computer Arithmetic, 25/06/18-27/06/18 pp. 37-44 . https://doi.org/10.1109/ARITH.2018.8464785
Neuromorphic chips are used to model biologically inspired Spiking-Neural-Networks(SNNs) where most models are based on differential equations. Equations for most SNN algorithms usually contain variables with one or more $e^{x}$ components. SpiNNaker
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::90500a5170189d04471525036d93eaec
https://doi.org/10.1109/arith.2018.8464785
https://doi.org/10.1109/arith.2018.8464785
Publikováno v:
FPL
Liu, G, Garside, J, Furber, S, Plana, L A & Koch, D 2017, Asynchronous Interface FIFO Design on FPGA for High-throughput NRZ Synchronisation . in 2017 27th International Conference on Field Programmable Logic and Applications (FPL) . International Conference on Field Programmable Logic and Applications, IEEE . https://doi.org/10.23919/FPL.2017.8056801
2017 27th International Conference on Field Programmable Logic and Applications (FPL)
Liu, G, Garside, J, Furber, S, Plana, L A & Koch, D 2017, Asynchronous Interface FIFO Design on FPGA for High-throughput NRZ Synchronisation . in 2017 27th International Conference on Field Programmable Logic and Applications (FPL) . International Conference on Field Programmable Logic and Applications, IEEE . https://doi.org/10.23919/FPL.2017.8056801
2017 27th International Conference on Field Programmable Logic and Applications (FPL)
Networks-on-chip (NoCs) have become a new chip design paradigm as the size of transistors continues to shrink. Globally-asynchronous locally-synchronous (GALS) on-chip networks are proposed for solving issues such as large clock tree distribution and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c8166143951cfcf1a3d17b6ca0e6ef1d
https://doi.org/10.23919/fpl.2017.8056801
https://doi.org/10.23919/fpl.2017.8056801
Publikováno v:
Sugiarto, I, Liu, G, Davidson, S, Plana, L A & Furber, S 2016, High performance computing on SpiNNaker neuromorphic platform: A case study for energy efficient image processing . in Performance Computing and Communications Conference (IPCCC), 2016 IEEE 35th International : IEEE . https://doi.org/10.1109/PCCC.2016.7820645
IPCCC
IPCCC
This paper presents an efficient strategy to implement parallel and distributed computing for image processing on a neuromorphic platform. We use SpiNNaker, a many-core neuromorphic platform inspired by neural connectivity in the brain, to achieve fa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::afe7f5c8a1b2d46a0ec6914dae6422df
https://www.research.manchester.ac.uk/portal/en/publications/high-performance-computing-on-spinnaker-neuromorphic-platform-a-case-study-for-energy-efficient-image-processing(453cb983-9f81-4521-8080-f1092692e7ba).html
https://www.research.manchester.ac.uk/portal/en/publications/high-performance-computing-on-spinnaker-neuromorphic-platform-a-case-study-for-energy-efficient-image-processing(453cb983-9f81-4521-8080-f1092692e7ba).html
Publikováno v:
2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).
The performance of modern supercomputers is ever-increasing. Different kinds of massively parallel programs are written to maximally utilise the computing power provided by these many-core computing machines. However, this performance shrinks when ne
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::58b3fbb1e63b43a779e3c2b0768405b4
https://doi.org/10.1109/prime.2015.7251376
https://doi.org/10.1109/prime.2015.7251376