Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Geert Simons"'
Autor:
Rich Wise, Samee Ur-Rehman, Mircea Dusa, Christiane Jehoul, Daniel Sobieski, Michael Kubis, Wenzhe Zhang, Geert Simons, Philippe Leray, Katja Viatkina, David Hellin, Patrick Jaenen, Charlotte Chahine
Publikováno v:
SPIE Proceedings.
With shrinking design rules, the overall patterning requirements are getting aggressively tighter and tighter. For the 5-nm node and beyond, on-product overlay below 2.5nm is required. Achieving such performance levels will not only need optimization
Publikováno v:
SPIE Proceedings.
Overlay requirements for DRAM devices are decreasing faster than anticipated. With current methods overlay becomes ever harder to control and therefore novel techniques are needed. This paper will present an alignment based method to address this iss
Autor:
Andre Bernardus Jeunink, Geert Simons, Jeroen Huijbregste, Ramon Navarro, Bart Luc Swinnen, Frank van Bilsen, Hoite Pieter Theodoor Tolsma, Henry Megens, Richard Johannes Franciscus Van Haren, Paul Christiaan Hinnen
Publikováno v:
SPIE Proceedings.
After the introduction of the ATHENATM alignment sensor, advanced applications of the sensor data are becoming increasingly important to meet the tightening overlay specifications for future technology nodes. As part of the total overlay budget, the
Autor:
Jaap Burghoorn, Ramon Navarro, Frank van Bilsen, Arie Jeffrey Den Boef, Sicco Ian Schets, Ron Schuurhuis, Stefan Carolus Jacobus Antonius Keij, Geert Simons
Publikováno v:
SPIE Proceedings.
Applying current and forthcoming optical lithography Step & Scan systems for IC manufacturing with 100 nm device resolution requires constant reduction of the relevant product overlay contributors. The system's wafer alignment sensor plays a key role
Autor:
Frank Bornebroek, Geert Simons, Sunny Stalnaker, Danu Satriasaputra, Bert Koek, Henry Megens, Jaap Burghoorn, James Sherwood Greeneich
Publikováno v:
SPIE Proceedings.
To guarantee less than 45 nm product overlay required for the 130 nm IC technology node a key in lithographic tools is a sophisticated wafer alignment sensor that is able to deal with the influences of new, advanced IC processing. To prove that produ