Zobrazeno 1 - 10
of 47
pro vyhledávání: '"Geert Mannaert"'
Autor:
Geert Mannaert, Hans Mertens, Maryam Hosseini, Steven Demuynck, Vy Thi Hoang Nguyen, B.T. Chan, Frédéric Lazzarino
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XII.
Autor:
E. Dupuy, Geert Mannaert, Ben Kaczer, Jacopo Franco, Vincent De Heyn, Narendra Parihar, Anne Vandooren, Gaspard Hiblot, Sylvain Baudot, Abdelkarim Mercha
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 21:192-198
This work reports on charging damage induced by gate antennae in high- $\kappa $ (HK) Replacement Metal Gate (RMG) technology for the HK-first and HK-last integration flows, comparing plate and comb layouts. For the HK-first devices, a significant de
Autor:
Naoto Horiguchi, Basoene Briggs, Boon Teik Chan, Steven Demuynck, Maryam Hosseini, Geert Mannaert, Hans Mertens, Yusuke Oniki, Sujith Subramanian, Zheng Tao
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XI.
Autor:
Hyo Seon Suh, Lander Verstraete, Julie Van Bel, Philippe Bézard, Geert Mannaert, Jae Uk Lee, Shouhua Wang, Ivan Pollentier, Ashish Rathore
Publikováno v:
Novel Patterning Technologies 2022.
Publikováno v:
ACS Applied Materials & Interfaces. 13:25357-25364
Directed self-assembly (DSA) of block copolymers (BCP) has attracted considerable interest from the semiconductor industry because it can achieve semiconductor-relevant structures with a relatively simple process and low cost. However, the self-assem
Autor:
Murat Pak, Xiu Mei Xu, Efrain Altamirano Sanchez, Christie Delvaux, Farid Sebaai, Geert Mannaert
Publikováno v:
Solid State Phenomena. 314:167-171
Test structure development is critical for single wafer pattern collapse evaluations. A good test vehicle not only allows optimization and benchmarking of different processes, but also facilitates understanding of the underlying mechanism. For high a
Autor:
S. Paolillo, Guillaume Boccardi, N. Jourdan, Manoj Jaysankar, Zheng Tao, Sylvain Baudot, Geert Mannaert, Juergen Boemmels, T. Hopf, E. Capogreco, Shouhua Wang, Efrain Altamirano, E. Dupuy, Olalla Varela Pedreira, B. Briggs, Thomas Chiarella, Joris Cousserier, Sofie Mertens, Romain Ritzenthaler, Frank Holsteyns, C. Lorant, Goutham Arutchelvan, Ingrid Demonie, Steven Demuynck, K. Kenis, Xiuju Zhou, Anshul Gupta, F. Sebai, D. Radisic, Zsolt Tokei, Erik Rosseel, A. Sepulveda, Naoto Horiguchi, Christel Drijbooms, Antony Premkumar Peter, Haroen Debruyn, Nouredine Rassoul, Bilal Chehab, P. Morin, Boon Teik Chan, Christopher J. Wilson, Katia Devriendt, Noemie Bontemps, Frederic Lazzarino, Paola Favia, Lieve Teugels, D. Yakimets, F. Schleicher, Houman Zahedmanesh, Jerome Mitard, Min-Soo Kim, An De Keersgieter, Sujith Subramanian, Kevin Vandersmissen, Hans Mertens, Eugenio Dentoni Litta, Yong Kong Siew
Publikováno v:
IEEE Transactions on Electron Devices. 67:5349-5354
Buried power rail (BPR) is a key scaling booster for CMOS extension beyond the 5-nm node. This work demonstrates, for the first time, the integration of tungsten (W) BPR lines with Si finFETs. BPR technology requires insertion of metal in the front-e
Autor:
Anshul Gupta, Zheng Tao, Dunja Radisic, Hans Mertens, Olalla Varela Pedreira, Steven Demuynck, Juergen Boemmels, Katia Devriendt, Nancy Heylen, Shouhua Wang, Karine Kenis, Lieve Teugels, Farid Sebaai, Christophe Lorant, Nicolas Jourdan, Boon Teik Chan, Sujith Subramanian, Filip Schleicher, Antony Peter, Nouredine Rassoul, Yong Kong Siew, Basoene Briggs, Dasiy Zhou, Erik Rosseel, Elena Capogreco, Geert Mannaert, Alfonso Sepúlveda Márquez, Emmanuel Dupuy, Kevin Vandersmissen, Bilal Chehab, Gayle Murdoch, Efrain Altamirano-Sánchez, Serge Biesemans, Zsolt Tokei, Eugenio Dentoni Litta, Naoto Horiguchi
Publikováno v:
Advanced Etch Technology and Process Integration for Nanopatterning XI.
Autor:
Stefan Kubicek, Naushad Variam, Pierre Eyben, Y. Kikuchi, Dan Mocuta, Naoto Horiguchi, A. Waite, T. Hopf, Jose Ignacio del Agua Borniquel, Geert Mannaert, Jean-Luc Everaert
Publikováno v:
Solid-State Electronics. 152:58-64
In this paper, high temperature Phosphorus ion implantation is applied to p-type Si (1 0 0) substrates and n-type bulk Si fin field-effect-transistors. Phosphorus profiles and sheet resistance on p-type Si (1 0 0) substrates are analyzed. High temper
Publikováno v:
Advances in Patterning Materials and Processes XXXVIII.
In contrast to the technology relying on the reaction of photosensitive materials with light, directed self-assembly (DSA) uses the microphase separation of block copolymer (BCP) to define the pattern. Because of the inherently different nature of pa