Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Gaurav Singh Bisht"'
Autor:
Nety M. Krishna, Gaurav Singh Bisht, Ralf Hofmann, Kaushal K. Singh, P.K. Singh, Suddhasatta Mahapatra
Publikováno v:
IEEE Electron Device Letters. 29:1389-1391
In this letter, we report metal nanocrystal (NC)-based flash memory devices with single-layer (SL) and dual-layer (DL) Pt NCs as the storage element. The devices are fabricated using CMOS compatible process flow with optimized low-leakage high-k Al2O
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::003f55deb80ffea2a1ace50b8540a9ad
https://doi.org/10.1109/led.2008.2007308
https://doi.org/10.1109/led.2008.2007308
Autor:
Rahul Dalia, Francesco Vescio, Gaurav Singh Bisht, Silvio Pierro, Attilio Piacente, Calogero Pace
Publikováno v:
2010 IEEE Instrumentation & Measurement Technology Conference Proceedings.
This work presents an automated measurement system designed and realized in order to perform low-frequency noise measurements on MOSFET devices with the easy of use and programmability of a Source-Measuring Unit (SMU). The designed instrument is made
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b4656a97188eed97a3ace025dc655ba3
https://doi.org/10.1109/imtc.2010.5488114
https://doi.org/10.1109/imtc.2010.5488114
Autor:
Souvik Mahapatra, M Sivatheja, Gautam Mukhopadhyay, P.K. Singh, Kshitij Auluck, C. Sandhya, Gaurav Singh Bisht, Ralf Hofmann
Publikováno v:
2010 IEEE International Reliability Physics Symposium.
Large memory window (6–9V) program/erase (P/E) cycling endurance is studied for evaluating their suitability for MLC operation. Effect of NC area coverage and device size is evaluated using statistical method. Constant voltage stress (CVS) measurem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::69eb926602544145cbefd09f759e1943
https://doi.org/10.1109/irps.2010.5488690
https://doi.org/10.1109/irps.2010.5488690
Autor:
Gaurav Singh Bisht, Souvik Mahapatra, Ralf Hofmann, M Sivatheja, P.K. Singh, Kshitij Auluck, Kaushal K. Singh
Publikováno v:
IndraStra Global.
Memory window (MW) and the retention of single-layer (SL) and dual-layer (DL) platinum (Pt) nanocrystal (NC) devices are extensively studied before and after program/erase (P/E) cycling. DL devices show better charge storage capability and reliabilit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5235da76def9ed8092f6061efa473a80
http://hdl.handle.net/10054/8444
http://hdl.handle.net/10054/8444
Publikováno v:
2009 IEEE International Memory Workshop.
Most of the current high-density Flash cells use multi-level-cell (MLC) technology to store 2-bits/cell to increase memory density. In this work, dual layer metal nanocrystal (NC) flash EEPROM device, with large memory window, good retention and 10 4
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2879760d4ca127eecaa1fd4d9b9cea6a
https://doi.org/10.1109/imw.2009.5090587
https://doi.org/10.1109/imw.2009.5090587
Autor:
C. Sandhya, Gaurav Singh Bisht, Nety M. Krishna, Souvik Mahapatra, P.K. Singh, Ralf Hofmann, Kaushal K. Singh, M Sivatheja, Gautam Mukhopadhyay
Publikováno v:
2009 IEEE International Reliability Physics Symposium.
Nanocrystal (NC) based memory devices are considered a possible alternative for floating gate (FG) replacement below 30nm node. In this work, endurance reliability of Pt NC devices is investigated for single layer (SL) and dual layer (DL) structures.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1404a92e9e5a9b1eb185f7f65c689f11
https://doi.org/10.1109/irps.2009.5173268
https://doi.org/10.1109/irps.2009.5173268