Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Garvit Juniwal"'
Publikováno v:
Hardware and Software: Verification and Testing ISBN: 9783319490519
Haifa Verification Conference
Haifa Verification Conference
Network Verification is emerging as a critical enabler to manage large complex networks. In order to scale to data-center networks found in Microsoft Azure we developed a new data structure called ddNF, disjoint difference Normal Form, that serves as
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::92ebd7359f691737073ff49bb8719947
https://doi.org/10.1007/978-3-319-49052-6_4
https://doi.org/10.1007/978-3-319-49052-6_4
Publikováno v:
Juniwal, G; Donzé, A; Jain, S; & Seshia, SA. (2015). Clustering-based active learning for CPSGrader. L@S 2015-2nd ACM Conference on Learning at Scale, 399-403. doi: 10.1145/2724660.2728702. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/9k1341p8
L@S
L@S
Copyright © 2015 ACM. In this work, we propose and evaluate an active learning algorithm in context of CPSGrader, an automatic grading and feedback generation tool for laboratory-based courses in the area of cyber-physical systems. CPSGrader detects
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::baed303a8b5d1c094f89955e6e7ec624
https://escholarship.org/uc/item/9k1341p8
https://escholarship.org/uc/item/9k1341p8
Autor:
Jyotirmoy V. Deshmukh, Alexandre Donzé, Shromona Ghosh, Xiaoqing Jin, Garvit Juniwal, Sanjit A. Seshia
Publikováno v:
Runtime Verification ISBN: 9783319238197
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::afc9b3cf591fe445d33fe422358640f8
https://doi.org/10.1007/978-3-319-23820-3_4
https://doi.org/10.1007/978-3-319-23820-3_4
Autor:
Jyotirmoy V. Deshmukh, Xiaoqing Jin, Garvit Juniwal, Shromona Ghosh, Alexandre Donzé, Sanjit A. Seshia
Publikováno v:
Formal Methods in System Design, vol 51, iss 1
Signal Temporal Logic (STL) is a formalism used to rigorously specify requirements of cyberphysical systems (CPS), i.e., systems mixing digital or discrete components in interaction with a continuous environment or analog com- ponents. STL is natural
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::695581849e13bcf7c36cf9f451883115
https://escholarship.org/uc/item/0sh5f5d0
https://escholarship.org/uc/item/0sh5f5d0
Publikováno v:
EMSOFT
Juniwal, G; Donzé, A; Jensen, JC; & Seshia, SA. (2014). CPSGrader: Synthesizing temporal logic testers for auto-grading an embedded systems laboratory. 2014 Proceedings of the International Conference on Embedded Software, EMSOFT 2014. doi: 10.1145/2656045.2656053. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/9tb3k46m
Juniwal, G; Donzé, A; Jensen, JC; & Seshia, SA. (2014). CPSGrader: Synthesizing temporal logic testers for auto-grading an embedded systems laboratory. 2014 Proceedings of the International Conference on Embedded Software, EMSOFT 2014. doi: 10.1145/2656045.2656053. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/9tb3k46m
We consider the problem of designing an automatic grader for a laboratory in the area of cyber-physical systems. The goal of this laboratory is to program a robot for specified navigation tasks. Given a candidate student solution (control program for
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b1f5515fd3a15a78ac4a1ff26350fb8a
https://doi.org/10.1145/2656045.2656053
https://doi.org/10.1145/2656045.2656053
Autor:
Armando Solar-Lezama, Garvit Juniwal, Rishabh Singh, Mukund Raghothaman, Emina Torlak, Sanjit A. Seshia, Rajeev Alur, Milo M. K. Martin, Rastislav Bodik, Abhishek Udupa
Publikováno v:
FMCAD
Alur, R; Bodik, R; Juniwal, G; Martin, MMK; Raghothaman, M; Seshia, SA; et al.(2013). Syntax-guided synthesis. 2013 Formal Methods in Computer-Aided Design, FMCAD 2013, 1-8. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/1g67m7hp
Other univ. web domain
Alur, R; Bodik, R; Juniwal, G; Martin, MMK; Raghothaman, M; Seshia, SA; et al.(2013). Syntax-guided synthesis. 2013 Formal Methods in Computer-Aided Design, FMCAD 2013, 1-8. UC Berkeley: Retrieved from: http://www.escholarship.org/uc/item/1g67m7hp
Other univ. web domain
The classical formulation of the program-synthesis problem is to find a program that meets a correctness specification given as a logical formula. Recent work on program synthesis and program optimization illustrates many potential benefits of allowi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::32bbea4e9ff9a6f12a2877b19a4493e9
https://doi.org/10.1109/fmcad.2013.6679385
https://doi.org/10.1109/fmcad.2013.6679385