Zobrazeno 1 - 10
of 94
pro vyhledávání: '"Gabriel Pares"'
Autor:
ÖZTÜRK, Adem
Bu çalışmanın amacı Armoni Orkestrası ve Fanfar Orkestrası için eser yazmak isteyen besteci adayları ile bestecilere çalgılama teknik ve yöntemleri hakkında bilgi vererek düzenleme konusunda dünyaca tanınan besteci Gabriel PARES'in d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______9464::3335a162bdb9f36bf52243f70c2c1085
http://hdl.handle.net/20.500.12602/187496
http://hdl.handle.net/20.500.12602/187496
Autor:
Gabriel Parés
Descubre el emocionante mundo de la música con el'Método elemental para flauta'de Gabriel Parés. Este libro es perfecto para quienes están dando sus primeros pasos en el aprendizaje de la flauta traversa. Con ejercicios preliminares, principios d
Publikováno v:
International Symposium on Microelectronics. 2018:000029-000036
In the aeronautical field, the electronic integration roadmaps show that the weight and the volume dedicated to on-board electronics must be reduced by a factor of 4 to 10 compared to the existing ones for the most recurrent functions in the next yea
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4552bc97ff81b5d95ce10529ea7b5e39
https://doi.org/10.4071/2380-4505-2018.1.000029
https://doi.org/10.4071/2380-4505-2018.1.000029
Autor:
Laetitia Adelmini, Michael Hofbauer, Jong Moo Lee, Olivier Lemonnier, Claudio J. Oton, Stefano Tondini, Philippe Velha, Paolo Pintus, Francesco Testa, Gabriel Pares, Giovai Battista Preve, Jose Angel Ayucar, C. L. Manganelli, Astghik Chalyan, Stefano Stracca, Horst Zimmermann, Bernhard Goll, Nikola Zecevic, Lorenzo Pavesi, Alberto Bianchi, Christophe Kopp, Aina Serrano, Guido Chiaretti, Min-su Kim, Giorgio Fontana
Publikováno v:
IEEE Photonics Technology Letters. 30:681-684
An electronic integrated circuit (EIC) and a silicon photonic integrated circuit (PIC) are 3D-integrated. The EIC using the complementary metal–oxide–semiconductor (CMOS) part of STMicroelectronics’ BCD8sp $0.16~\mu \text{m}$ technology control
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::37988fb2578693cf2facd07bb632f973
https://doi.org/10.1109/lpt.2018.2811464
https://doi.org/10.1109/lpt.2018.2811464
Publikováno v:
International Symposium on Microelectronics. 2017:000754-000760
The first part of this work is dedicated to the study of “system in package” (SiP) solutions based on different substrates, namely organic or silicon. Generally speaking a SIP is composed by several active and passive components stacked on an int
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a9e4e83491cb865c5343b6977ff0fa4
https://doi.org/10.4071/isom-2017-thp43_125
https://doi.org/10.4071/isom-2017-thp43_125
Autor:
Jean Charbonnier, Pierre Tissier, R. Coquand, Gabriel Pares, Thierry Mourier, Sophie Verrun, R. Franiatte, Stephane Minoret, F. Allain, Mehmet Bicer, Myriam Assous, C. Ribiere
Publikováno v:
69th Electronic Components and Technology Conference
69th Electronic Components and Technology Conference, May 2019, Las Vegas, United States. pp.1622-1628, ⟨10.1109/ECTC.2019.00249⟩
69th Electronic Components and Technology Conference, May 2019, Las Vegas, United States. pp.1622-1628, ⟨10.1109/ECTC.2019.00249⟩
International audience; Micro pillars and micro bumps interconnections are considered as mature technology for 3-D integration and chip stacking. However, in the framework of high-energy particles detection as ATLAS Large Hadron Collider new tracker
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::112192c5ae8aee2a47a8c2ab0b5895a9
https://hal.archives-ouvertes.fr/hal-02475226
https://hal.archives-ouvertes.fr/hal-02475226
Autor:
Giry Alexandre, Gabriel Pares, Michel Jean-Philippe, Ferris Pierre, Serhan Ayssar, Deschaseaux Edouard
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
Silicon interposers are providing interesting alternatives to organic packages for the fabrication of complex system in package (SIP) modules in particular for RF application. Among the advantages of this technology are the capability to fabricate fi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a7cf37c5de5bc21aa7719098dd9b039
https://doi.org/10.1109/ectc.2019.00198
https://doi.org/10.1109/ectc.2019.00198
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
The present study focuses on a 3D module composed of two stacks of 8 silicon chiplets interconnected with copper Through Molding Vias and ReDistribution Layer realized in Fan-Out Wafer-Level Packaging technology. The thermal management of such 3D mod
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7d9c8f888ed80ae20191a409062b0432
https://doi.org/10.1109/ectc.2019.00236
https://doi.org/10.1109/ectc.2019.00236
Autor:
Stefano Stracca, Michael Hofbauer, Francesco Testa, Fabrizio Gambini, Nikola Zecevic, Jong-Moo Lee, Paolo Pintus, Claudio J. Oton, Stefano Faralli, C. L. Manganelli, Guido Chiaretti, Christophe Kopp, Stefano Tondini, Giorgio Fontana, Astghik Chalyan, Bernhard Goll, Lorenzo Pavesi, Philippe Velha, Horst Zimmermann, Reinhard Enne, Gabriel Pares, Alberto Bianchi, Aina Serrano
This paper reports the performances of a silicon photonics optical switch matrix fabricated by using large-scale three-dimensional (3-D) integration. The wavelength selective optical switch consists of a photonic integrated circuit (PIC), with 1398 c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d8b9874095a4433f8d5c8edf31b64910
https://biblio.vub.ac.be/vubir/integrated-reconfigurable-silicon-photonics-switch-matrix-in-iris-project-technological-achievements-and-experimental-results(74ec7402-d311-4b0a-9043-bf16b9b585a0).html
https://biblio.vub.ac.be/vubir/integrated-reconfigurable-silicon-photonics-switch-matrix-in-iris-project-technological-achievements-and-experimental-results(74ec7402-d311-4b0a-9043-bf16b9b585a0).html
Autor:
Sylvie Menezo, Stephane Bernabe, Jose Luis Gonzalez Jimenez, Daivid Fowler, Olivier Castany, Guillaume Waltener, Christophe Kopp, Gabriel Pares, Khodor Hussein Rida
Publikováno v:
IEEE Transactions on Components, Packaging and Manufacturing Technology. 6:1018-1025
Providing host Application-specific integrated circuit (ASIC) (e.g., microprocessors, switches, or field-programmable gate array (FPGAs)) with terabit per second optical transmission capabilities has emerged as a new requirement in exascale cloud dat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::345963e04eb6023b5061da25f4679946
https://doi.org/10.1109/tcpmt.2016.2514320
https://doi.org/10.1109/tcpmt.2016.2514320