Zobrazeno 1 - 10
of 17
pro vyhledávání: '"G.T. Uehara"'
Autor:
G.T. Uehara, P.R. Gray
Publikováno v:
IEEE Transactions on Magnetics. 31:1174-1179
Analog pre-equalization can play an important role in the performance and monolithic implementation of high speed PRML read channels employing detection in the digital domain by reducing the number of quantization levels required in the analog-to-dig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d91f4b5b5d90c81e6bca5932c3780a6
https://doi.org/10.1109/20.364803
https://doi.org/10.1109/20.364803
Publikováno v:
IEEE Journal of Solid-State Circuits. 30:228-234
A new architecture for digital implementation of the adaptive equalizer in Class IV partial-response maximum likelihood (PRML) channels employing parallelism and pipelining is described. The architecture was used in a prototype integrated circuit in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39a1c002034f7b5862625f5b0384eb3f
https://doi.org/10.1109/4.364436
https://doi.org/10.1109/4.364436
Publikováno v:
1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278).
As speed demands in broadband communication systems increase into the Gb/s region, economical implementation of robust high-speed soft-decision error-correcting decoders becomes necessary. Convolutional codes are one approach that have been widely em
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c3b625c7905c0ac0a84eaf987c8680e9
https://doi.org/10.1109/isscc.1999.759284
https://doi.org/10.1109/isscc.1999.759284
Autor:
Paul R. Gray, G.T. Uehara
Publikováno v:
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems.
A new approach for monolithic CMOS implementation of the low-pass filter function in analog front-ends for receivers in high speed data communications applications is presented. The approach is based on switched-capacitor transversal filter structure
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a254c17e678c4cc8396cb82b2415dcd7
https://doi.org/10.1109/iscas.1992.230497
https://doi.org/10.1109/iscas.1992.230497
Publikováno v:
1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC.
This paper describes an analog discrete-time equalizer that uses switched-capacitor (SC) filtering capable of achieving speeds higher than can otherwise be attained using conventional opamp techniques. The approach employs parallelism and exclusive u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::860d4e26475555c5eeba481c874b0f47
https://doi.org/10.1109/isscc.1996.488520
https://doi.org/10.1109/isscc.1996.488520
Publikováno v:
Proceedings of OCEANS'94.
Research in the design of combining coding with bandwidth efficient modulation known as coded modulation has shown that high data rate reliable transmission over a variety of channels is achievable. The application of these coding techniques to the b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::351465226bda490a9ac59311e60619b2
https://doi.org/10.1109/oceans.1994.363838
https://doi.org/10.1109/oceans.1994.363838
Publikováno v:
Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.
A new architecture for digital implementation of the adaptive equalizer in Class IV Partial Response Maximum Likelihood (PRML) channels employing parallelism and pipelining is described. The architecture was used in a prototype integrated circuit in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82a891db338b11cf2dc29b34889348d1
https://doi.org/10.1109/cicc.1994.379768
https://doi.org/10.1109/cicc.1994.379768
Autor:
Paul R. Gray, G.T. Uehara
Publikováno v:
Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94.
A key element in the signal path of magnetic-disk read channels employing digital implementations of PRML and other discrete-time signalling approaches is the analog-to-digital (A/D) interface containing a pre-filter, sampler, and analog-to-digital c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6a0cbea509d0e910e3d537c6f52b8ac4
https://doi.org/10.1109/isscc.1994.344641
https://doi.org/10.1109/isscc.1994.344641
Publikováno v:
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).
This paper describes circuit techniques for the implementation of low-voltage CMOS integrators for continuous-time filters. A prototype sixth-order Butterworth lowpass filter with two programmable zeros was designed and developed to demonstrate the p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4cffc2e18b870f1612d101d65cd58028
https://doi.org/10.1109/cicc.1998.695012
https://doi.org/10.1109/cicc.1998.695012
Publikováno v:
Proceedings of the IEEE 1998 Custom Integrated Circuits Conference (Cat. No.98CH36143).
This paper describes a monolithic fixed equalizer/slicer combination for high speed communication over low-cost light-weight RG-316 coaxial cable. Measured data shows the equalizer/slicer effective for cable lengths up to 30 feet with data rates of 1
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a09f02f34303471116740665d4a12f0c
https://doi.org/10.1109/cicc.1998.694996
https://doi.org/10.1109/cicc.1998.694996