Zobrazeno 1 - 10
of 94
pro vyhledávání: '"G.B. Ang"'
Autor:
A.C.T. Quah, C.Q. Chen, G.B. Ang, H.P. Ng, Francis Rivai, Zhihong Mai, J. Lam, Angela Teo, P.T. Ng
Publikováno v:
Microelectronics Reliability. :261-266
SRAM is most important component in the logic product. The failure analysis on the SRAM is well developed, but the SRAM IDDOFF analysis is still challenging for the FA engineers. The product has passed the functional test when IDDOFF is measured. Thi
Autor:
J. Lam, G.B. Ang, D. Nagalingam, S.P. Neo, Zhihong Mai, Francis Rivai, K. H. Yip, P.T. Ng, C.Q. Chen
Publikováno v:
Microelectronics Reliability. :141-144
As semiconductor technology keeps scaling down, many advanced technology and process were applied in the semiconductor process. Especially for the application of IOT (internet of thing) technology, the low leakage and low power consumption product wa
Publikováno v:
Microelectronics Journal. 62:38-42
IC functional failure is always a challenge for failure analysis engineers since it needs test pattern to access the defect location and electrically trigger it. Dynamic failure analysis is the only way to be used to do this kind of analysis. But it'
Publikováno v:
Microelectronics Reliability. 64:317-320
Implantation is the key process in the modern semiconductor process which forms the basic device cell by different doping ditribution, depth, angle and element type. They are the key factors to affect the transistor performance, but the implantation-
Autor:
G.B. Ang, Naiyun Xu, H.P. Ng, Angela Teo, Yong Seng Tam, C. Q. Chen, D. Nagalingam, Zhihong Mai, Jeffrey Lam
Publikováno v:
International Symposium for Testing and Failure Analysis.
This paper places a strong emphasis on the importance of applying the correct FA approach in physical sample preparation to identify hidden defects that can be easily removed during analysis. A combination of mechanical parallel polishing and chemica
Autor:
Zhihong Mai, J. Lam, H.P. Ng, Siong Luong Ting, C.Q. Chen, Angela Teo, G.B. Ang, P.T. Ng, Francis Rivai
Publikováno v:
International Symposium for Testing and Failure Analysis.
As semiconductor technology keeps scaling down, failure analysis and device characterizations become more and more challenging. Global fault isolation without detailed circuit information comprises the majority of foundry EFA cases. Certain suspected
Autor:
J. Lam, H.P. Ng, C.Q. Chen, Zhihong Mai, G.B. Ang, D. Nagalingam, P.T. Ng, K. H. Yip, Francis Rivai
Publikováno v:
2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).
As the development of semiconductor process, more and more advanced technologies were applied in the IC manufacturing. The device becomes more precise, and more sensitive to the minor process variation. Failure analysis challenge comes along with the
Autor:
G.B. Ang, Y.T. Ngow, B.L. Yeoh, Hnin Hnin W Ma, Jeffrey Lam, Lin Zhao, S.P. Neo, Y.H. Chan, Alan Tan, C.C. Tay, Varun Gupta, Hu Hao, G.F. You, S.H. Goh, M. Lee
Publikováno v:
International Symposium for Testing and Failure Analysis.
EeLADA has been introduced previously as a prospective alternative approach to DFT scan diagnosis for scan logic defect localization. It has the capability to reveal induced signals from laser stimulation that are relevant to the failure signature by
Autor:
Zhihong Mai, S. Moon, Alfred Quah, Jeffrey Lam, D. Nagalingam, G.B. Ang, H.H. Ma, S.P. Neo, C.Q. Chen, E. Susanto
Publikováno v:
International Symposium for Testing and Failure Analysis.
In this paper, the effects of an open defect resulting in floating gate on combinational logic gate structures are studied. From this study, a novel method is derived to predict and narrow down the potential open defect location from a long failure p
Autor:
H.P. Ng, Naiyun Xu, C. Q. Chen, Angela Teo, G.B. Ang, Nagalingam Dayanand, Jeffrey Lam, Zhihong Mai, Alfred Quah
Publikováno v:
International Symposium for Testing and Failure Analysis.
This paper discussed on how the importance of failure analysis to identify the root cause and mechanism that resulted in the MEMS failure. The defect seen was either directly on the MEMS caps or the CMOS integrated chip in wafer fabrication. Two case