Zobrazeno 1 - 10
of 42
pro vyhledávání: '"G. Nuzillat"'
Publikováno v:
MTT-S International Microwave Symposium Digest.
A new monolithically integrated GaAs decision circuit has been fabricated in order to satisfy speed requirements of a 840 Mbit/s coaxial cable PCM transmission system. The circuit is of SSI complexity (about 60 integrated components) and utilizes nor
Publikováno v:
IEEE Transactions on Electron Devices. 27:1102-1109
The stringent pinchoff voltage control required by the normally-off GaAs FET logic approach appears to be a very serious limitation to its LSI capability. This paper presents the operation and performance of a more tolerant logic IC approach intented
Publikováno v:
IEEE Transactions on Electron Devices. 29:1110-1115
An 8-bit fully decoded RAM test circuit has been designed and fabricated using enhancement-mode GaAs-MESFET's with the LPFL circuit approach. Correct operation of the circuit has been observed for a supply voltage varying from 3.5 to 7 V. An access t
Publikováno v:
IEEE Transactions on Electron Devices. 27:1019-1024
The evolution of the drain saturation current of the carrier concentration and of the equipotential lines in a GaAs MESFET, were studied taking into account the existence of an interfacial barrier between the active layer and the SI substrate. A bidi
Publikováno v:
IEEE Journal of Solid-State Circuits. 18:365-369
The realization and performance of a low-power buffered FET logic (1p-BFL) 4 bit ripple carry adder is reported. Performance measurements indicate a critical path average propagation delay of 1.9 ns at a total power dissipation of 45 mW, output buffe
Autor:
G. Nuzillat, E.H. Perea, F. Damay-Kavala, M. Peltier, M. Gloanec, Tung Pham Ngu, G. Bert, C. Arnodo
Publikováno v:
IEEE Journal of Solid-State Circuits. 17:569-584
This paper gives an overview of the basic concepts used in the design and fabrication of gallium arsenide MESFET integrated circuits intended for gigabit logic applications. The present status of speed-power performances, packing densities, and integ
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 28:472-478
A first generation of monolithic digital IC's using normally-on type GaAs MESFET's with 1.2-mu m gate length was initially developed. This technology leads to logic gates with propagation delays in the range 130-170 ps. It was applied to the fabricat
Autor:
M. Ohmori, H. Kusakawa, T. Mimura, G. Nuzillat, N. Kato, T. Mizutani, M. Gloanec, F.S. Lee, T. Van Duzer, Nelson J. Ho, M. Peltier, C.F. Krumm, H.L. Grubin, Naoki Yokoyama, R.C. Eden, D.J. Herrell, P.C. Arnett, R. Zucca, M. Ino, W.R. Curtice, N.G. Alexapoulos, S.I. Long, K. Suyama, P.T. Greiling, B.E. Dobratz, M. Fukuta, B.M. Welch, M. Ida, J.A. Maupin, C. Arnodo
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 28:508-512
Publikováno v:
IEEE Journal of Solid-State Circuits. 11:385-394
Using a simple channel implantation step, the choice of the threshold voltage determines speed and power. Illustrations are given by the example of a 3-input NOR-gate with 1/spl times/5-/spl mu/m/SUP 2/ channel geometry for the switching transistors.
Publikováno v:
Solid State Communications. 7:1123-1128
Resume On compare les resultats concernant l'evaluation des densites d'etats de surface dans les structures MOS en utilisant la methode de Berglund1 et une methode que nous avons decrite precedemment.2 On trouve, par les deux methodes et avec un bon