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pro vyhledávání: '"G. Curello"'
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Publikováno v:
Scopus-Elsevier
Formation of epitaxial Si1−xGex layers by high-dose Ge+ implantation into Si has been investigated under different beam-power densities regimes. Ge+ ions with incident energies of 200 and 250 keV were implanted into (100) Si. Ion fluences were betw
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::905099e108f7d6af945b16a210914315
https://doi.org/10.1016/s0168-583x(97)00326-1
https://doi.org/10.1016/s0168-583x(97)00326-1
Autor:
Bruce Woolery, Abdur Rahman, J.-Y. Yeh, P. Bai, M. Jamil, K. Phoa, C.-H. Jan, Curtis Tsai, G. Curello, J. Hicks, M. S. Rahman, Joodong Park
Publikováno v:
2013 IEEE International Reliability Physics Symposium (IRPS).
Transistor reliability characterization studies are reported for a state of the art 22nm 3-D tri-gate HK/MG SoC technology with logic and HV I/O transistor architecture. TDDB, BTI and HCI degradation modes for logic and I/O transistors are studied an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9fd0814444461441fe012d7275e86cfe
https://doi.org/10.1109/irps.2013.6532105
https://doi.org/10.1109/irps.2013.6532105
Publikováno v:
Journal of Physics D: Applied Physics. 29:1822-1830
Surface and buried layers of ternary silicide were fabricated by implantation of iron and cobalt into (100) silicon wafers. For the surface layers two sets of samples with different iron to cobalt ratios were prepared. In the first set, cobalt was im
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da0bc35f4efe838d2049e7ff931c32ec
https://doi.org/10.1088/0022-3727/29/7/017
https://doi.org/10.1088/0022-3727/29/7/017
Autor:
K. Komeyli, H. Tashiro, J.-Y. Yeh, Joodong Park, C. Staus, M. Kang, M. Jang, Uddalak Bhattacharya, P. Bai, Abdur Rahman, Chia-Hong Jan, Kinyip Phoa, Curtis Tsai, P. Vandervoorn, Ruth A. Brain, L. Yang, G. Curello, Nidhi Nidhi, S.-J. Choi, G. Gupta, Hafez Walid M, L. Pan, T. Leo
Publikováno v:
2012 International Electron Devices Meeting.
A leading edge 22nm 3-D tri-gate transistor technology has been optimized for low power SoC products for the first time. Low standby power and high voltage transistors exploiting the superior short channel control, < 65mV/dec subthreshold slope and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::65cbc6de11013a48dd62c1a5522bbbc4
https://doi.org/10.1109/iedm.2012.6478969
https://doi.org/10.1109/iedm.2012.6478969
Autor:
Kevin P. Homewood, B.J. Sealy, M. S. Finney, Y.S. Tan, Daniel Leong, Z. Yang, Karen J. Reeson, M.A. Harry, S. Hutchinson, G. Curello, Russell M. Gwilliam, Twan Bearda
Publikováno v:
Scopus-Elsevier
The electrical and optical properties of FeSi2 structures produced by ion beam synthesis (IBS) are investigated. Above 150 K both α and βFeSi2n-Si structures display good Schottky diode characteristics. βFeSi2n-Si exhibits a low reverse leakage cu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d7934c0ff56bbb77a39f50b77a10b8ff
https://doi.org/10.1016/0168-583x(96)80031-0
https://doi.org/10.1016/0168-583x(96)80031-0
Autor:
M.A. Harry, Russell M. Gwilliam, Karen J. Reeson, B.J. Sealy, G. Curello, S. Hutchinson, M. S. Finney
Publikováno v:
Scopus-Elsevier
Ternary silicide layers were fabricated by the implantation of iron and cobalt into (100) silicon wafers. Two sets of samples with different iron to cobalt ratios were prepared, with cobalt being implanted first followed by iron in the first set, and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::406c2da34cea9b801eadd87a37cba9fb
https://doi.org/10.1016/0168-583x(94)00518-4
https://doi.org/10.1016/0168-583x(94)00518-4
Autor:
Abdur Rahman, J.-Y. Yeh, M. Agostinelli, K. Phoa, G. Curello, P. Bai, Joodong Park, Curtis Tsai, Hafez Walid M, C.-H. Jan, K. Komeyli, H. Deshpande, J. Xu
Publikováno v:
2011 International Reliability Physics Symposium.
Extensive reliability characterization of a state of the art 32nm strained HK/MG SoC technology with triple transistor architecture is presented here. BTI, HCI and TDDB degradation modes on the Logic and I/O (1.2V, 1.8V and 3.3V tolerant) transistors
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7ad3ffc66cc85e2e246a975e7733e28e
https://doi.org/10.1109/irps.2011.5784531
https://doi.org/10.1109/irps.2011.5784531
Autor:
Mohammed A El-Tanani, H. Deshpande, Krishnamurthy Soumyanath, S. Mudanai, Abdur Rahman, Hafez Walid M, M. Agostinelli, Hasnain Lakdawala, U. Jalan, J.-Y. Yeh, L. Rockford, Stewart S. Taylor, Kwang-Jin Koh, P. Vandervoorn, L. Janbay, H. Tashiro, L. Yang, S.-J. Choi, M. Kang, P. Bai, Curtis Tsai, J. Lin, Jad B. Rizk, K. Phoa, Hongtao Xu, J. Xu, K. Komeyli, Nick Lindert, J. Yip, G. Sacks, Ian A. Young, C.-H. Jan, G. Curello, Joodong Park
Publikováno v:
2010 Symposium on VLSI Technology.
A 32nm RF SOC technology is developed with high-k/metal-gate triple-transistor architecture simultaneously offering devices with high performance and very low leakage to address advanced RF/mobile communications markets. A high performance NMOS achie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b6b5e40107c1a394af62bae286b1d46
https://doi.org/10.1109/vlsit.2010.5556201
https://doi.org/10.1109/vlsit.2010.5556201
Autor:
J.-Y. Yeh, M. Prince, L. Rockford, Kevin Zhang, J. Lin, Pramod Kolar, B. Landau, H. Tashiro, Ian R. Post, Seung Hwan Lee, N. Lazo, A. Schmitz, S. Gannavaram, P. Bai, P. Vandervoorn, Zhanping Chen, S. Ma, J. Xu, G. Curello, K. Komeyli, L. Yang, Nick Lindert, J. Rizk, C.-H. Jan, S.-J. Choi, J. Yip, Yuegang Zhang, M. Agostinelli, Joodong Park, Curtis Tsai, Hafez Walid M, A. Lake, K. Phoa, N. Pradhan, H. Deshpande, C. Meining, M. Kang, L. McGill, A. Paliwal, G. Sacks, T. Leo, M. Buehler, U. Jalan, Abdur Rahman
Publikováno v:
2009 IEEE International Electron Devices Meeting (IEDM).
A leading edge 32nm high-k/metal gate transistor technology has been optimized for SoC platform applications that span a wide range of power, performance, and feature space. This technology has been developed to be modular, offering mix-and-match tra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::93c5c78a71e8bd1f995efb0a3568b699
https://doi.org/10.1109/iedm.2009.5424258
https://doi.org/10.1109/iedm.2009.5424258