ESD robustness improvement for integrated DMOS transistors -the different gate-voltage dependence of It2 between VDMOS and LDMOS transistors

Autor: Yasufumi Fujiwara, Shigeto Maegawa, Kenichi Hatasako, T. Kuroi, Akio Uenishi, Fumitoshi Yamamoto

Publikováno v: IEEJ Transactions on Electrical and Electronic Engineering. 6:361-366

This paper presents the device-level electrostatic discharge (ESD) robustness improvement for integrated vertical double-diffused MOS (VDMOS) and lateral double-diffused MOS (LDMOS) transistors by changing device structure. The ESD robustness of VDMO

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::f6387298ff42d34d79c2d64274177235
https://doi.org/10.1002/tee.20669

Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness

Autor: Fumitoshi Yamamoto, Akio Uenishi, Shigeto Maegawa, Kenichi Hatasako, Takashi Kuroi

Publikováno v: Japanese Journal of Applied Physics. 48:04C074

[Bipolar]-[complementary metal–oxide–semiconductor transistor (CMOS)]–[double-diffused metal–oxide–semiconductor transistor (DMOS)] [BiC–DMOS] devices are widely used in high-voltage applications. As some applications require high electro

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::693c6fc992406b6759d1dc77b1362e9e
https://doi.org/10.1143/jjap.48.04c074

60 V field NMOS and PMOS transistors for the multi-voltage system integration.

Autor: Terashima, T., Yamamoto, F., Hatasako, K., Hine, S.

Publikováno v: Proceedings of the 13th International Symposium on Power Semiconductor Devices & ICs. IPSD '01 (IEEE Cat. No.01CH37216); 2001, p259-262, 4p

ESD robustness improvement for integrated DMOS transistors -the different gate-voltage dependence of I.

Autor: Hatasako, Kenichi, Yamamoto, Fumitoshi, Uenishi, Akio, Kuroi, Takashi, Maegawa, Shigeto, Fujiwara, Yasufumi

Publikováno v: IEEJ Transactions on Electrical & Electronic Engineering; Jul2011, Vol. 6 Issue 4, p361-366, 6p

Novel Design of Vertical Double-Diffused Metal–Oxide–Semiconductor Transistor for High Electrostatic Discharge Robustness.

Autor: Hatasako, Kenichi, Yamamoto, Fumitoshi, Uenishi, Akio, Kuroi, Takashi, Maegawa, Shigeto

Publikováno v: Japanese Journal of Applied Physics; Apr2009, Vol. 48 Issue 4S, p1-1, 1p