Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Fumihiro Hatano"'
Publikováno v:
Transactions of the Institute of Systems, Control and Information Engineers. 16:439-450
The performance of the Cell Array's structure for the Dynamically Reconfigurable Cell-Array Processor (DRCAP), which we first proposed in 1997, in actual program execution is examined. In the DRCAP, the processing of c-language program sentences, suc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::72117451fa9040c1cd628f356d822eb1
https://doi.org/10.5687/iscie.16.439
https://doi.org/10.5687/iscie.16.439
Publikováno v:
IJCNN
Examines the set of the machine instruction of the cell array processor. A programming tool is developed to describe the machine instruction easily and the usage of this processor is described. Backpropagation is used as the example of the program. B
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::96fbb70542e578bee5a2efb294257f68
https://doi.org/10.1109/ijcnn.1999.833455
https://doi.org/10.1109/ijcnn.1999.833455
Publikováno v:
IJCNN
We have been studying the neuro-processor that is reconfigured according to needs. We propose an architecture and examine the components of this processor. We implement this processor by using FPGAs. We design this processor by a hardware description
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07e057452d4fbf8d9f2151e1f89a0418
https://doi.org/10.1109/ijcnn.1999.833454
https://doi.org/10.1109/ijcnn.1999.833454
Publikováno v:
SPIE Proceedings.
We have been developing a parallel processor that it is possible to reconfigure hardware according to a software. Dynamic Reconfiguration means to change a kind of and a number of processing elements and connection between processing elements at real
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::028f78d157c41446483d80042bdca5f9
https://doi.org/10.1117/12.434378
https://doi.org/10.1117/12.434378
Publikováno v:
SPIE Proceedings.
Three kinds of basic Variable Length Decoder were implemented on Dynamically Reconfigurable Cell Array Processor. Traditional method, Leading zeros method, Generated unique address method were discussed. The number of required resources for each Deco
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::31a3490ce0dd2b90895053110bb2524d
https://doi.org/10.1117/12.434377
https://doi.org/10.1117/12.434377
Publikováno v:
SPIE Proceedings.
We have been developing a parallel processor that it is possible to reconfigure to realize a general-purpose computation at very high speed. Dynamic Reconfiguration means to change a kind of and a number of processing elements and connection between
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e9e0bd609dcf52c4d74daf9631da093a
https://doi.org/10.1117/12.402522
https://doi.org/10.1117/12.402522
Publikováno v:
SPIE Proceedings.
We have proposed and developed the Dynamically Reconfigurable Cell-Array Processor (DRCAP) that consists of functional Cell Arrays (CAs), and buses/bus-switches that provide with connections between CAs. A software simulator of the DRCAP is construct
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::433497cd94ac1450c390eb7a34be654c
https://doi.org/10.1117/12.402526
https://doi.org/10.1117/12.402526
Publikováno v:
SPIE Proceedings.
Our processor is featured by the architecture such that the configuration can be dynamically and optimally rearranged inreal-time. We have already developed the instruction sets, the emulation and debug programs for the present processor,utilizing ci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::41a100f9b348025528a4c88c098b35fd
https://doi.org/10.1117/12.402513
https://doi.org/10.1117/12.402513
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Conference
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