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pro vyhledávání: '"Fujiki, Daichi"'
Autor:
Otsuka, Hikari, Chijiwa, Daiki, García-Arias, Ángel López, Okoshi, Yasuyuki, Kawamura, Kazushi, Van Chu, Thiem, Fujiki, Daichi, Takeuchi, Susumu, Motomura, Masato
Randomly initialized dense networks contain subnetworks that achieve high accuracy without weight learning -- strong lottery tickets (SLTs). Recently, Gadhikar et al. (2023) demonstrated that SLTs can also be found within a randomly pruned source net
Externí odkaz:
http://arxiv.org/abs/2402.14029
Autor:
Chen, Yung-Chin, Ando, Shimpei, Fujiki, Daichi, Takamaeda-Yamazaki, Shinya, Yoshioka, Kentaro
To address the 'memory wall' problem in NN hardware acceleration, we introduce HALO-CAT, a software-hardware co-design optimized for Hidden Neural Network (HNN) processing. HALO-CAT integrates Layer-Penetrative Tiling (LPT) for algorithmic efficiency
Externí odkaz:
http://arxiv.org/abs/2312.06086
Vector processing has become commonplace in today's CPU microarchitectures. Vector instructions improve performance and energy which is crucial for resource-constraint mobile devices. The research community currently lacks a comprehensive benchmark s
Externí odkaz:
http://arxiv.org/abs/2309.02680
Autor:
Chen, Yung-Chin, Ando, Shimpei, Fujiki, Daichi, Takamaeda-Yamazaki, Shinya, Yoshioka, Kentaro
Computing-in-Memory (CIM) has shown great potential for enhancing efficiency and performance for deep neural networks (DNNs). However, the lack of flexibility in CIM leads to an unnecessary expenditure of computational resources on less critical oper
Externí odkaz:
http://arxiv.org/abs/2308.15040
Autor:
Fujiki, Daichi
General purpose processors and accelerators including system-on-a-chip and graphics processing units are composed of three principal components: processor, memory, and interconnection of these two. This simple but powerful architecture model has been
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4f8c266ee573521cf2a1ae1f3e4647a1
Akademický článek
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Publikováno v:
Synthesis Lectures on Computer Architecture; 8/11/2021, Vol. 16 Issue 2, pix-124, 132p
Publikováno v:
ACM / SIGPLAN Notices; Feb2018, Vol. 53 Issue 2, p1-14, 14p
Publikováno v:
2016 24th Euromicro International Conference on Parallel, Distributed & Network-Based Processing (PDP); 2016, p168-175, 8p