Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Fred Wafula"'
Publikováno v:
Journal of The Electrochemical Society. 166:D3136-D3141
Publikováno v:
2018 IEEE International Interconnect Technology Conference (IITC).
Electrolytic cobalt fill of sub-5 nm node features and a proposed model for the fill mechanism supported by cyclic voltammetry is presented. The transformation of the organic plating additive from an active to a de-activated state at the bottom of th
Autor:
Gyanaranjan Pattanaik, Peter Reilly, Anh Nguyen, Jack Enloe, Michael Flynn, Alison Gracias, Kevin Fealey, Fred Wafula
Publikováno v:
Journal of Microelectronics and Electronic Packaging. 12:43-48
This study addresses the impact of bath stability on electroplated copper for through-silicon via (TSV) in a controlled manufacturing environment. Microstructure, impurities, and other properties of the copper produced were characterized using an arr
Despite the importance of knowledge in Biology, candidates’ performance at the national examination, The Kenya Certificate of Secondary Education (KCSE) is poor. This could be attributed to the teaching methods. The purpose of this study was to com
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6d1965a422b738a0fb1cb93f44963a7e
Autor:
Anh Nguyen, Jack Enloe, Fred Wafula, Kevin Fealey, Peter Reilly, Alison Gracias, Gyanaranjan Pattanaik, Michael Flynn
Publikováno v:
International Symposium on Microelectronics. 2014:000013-000018
This study addresses the impact of bath stability on electroplated copper for through silicon via (TSV) in a controlled manufacturing environment. Microstructure, impurities and other properties of the copper produced were characterized using an arra
Autor:
Tyler Barbera, Gert J. Leusink, Gyanaranjan Pattanaik, Fred Wafula, Larry Smith, Brian Sapp, Victor Vartanian, Toshio Hasegawa, Steve Golovato, Alison Gracias, Kaoru Maekawa, Shan Hu, Steve Olson, Jack Enloe, Kai-Hung Yu, Klaus Hummler
Publikováno v:
International Symposium on Microelectronics. 2014:000001-000007
SEMATECH evaluated the impact of various process options on the overall manufacturing cost of a TSV module, from TSV lithography and etch through post-plate CMP. The purpose of this work was to understand the cost differences of these options in orde
Autor:
Tyler Barbera, Klaus Hummler, Gyanaranjan Pattanaik, Larry Smith, Gert J. Leusink, Steve Olson, Brian Sapp, Kai-Hung Yu, Shan Hu, Akira Fujita, Alison Gracias, Jack Enloe, Kaoru Maekawa, Kenneth Matthews, Victor Vartanian, Fred Wafula
Publikováno v:
International Symposium on Microelectronics. 2014:000794-000803
Even as unit processes for high aspect ratio (HAR) through silicon via (TSV) mid-wafer front-side processing are becoming relatively mature, scaling of the TSVs and reduction of cost of ownership (COO) drive significant innovations in processes, equi
Publikováno v:
ECS Meeting Abstracts. :1050-1050
As on-chip interconnect sizes continue to shrink to address the increased device density needs at 7 nm nodes and beyond, copper interconnects start showing an increase of electrical resistivity compared to bulk copper due to the scaling effect. Recen
Publikováno v:
Journal of Electronic Materials. 41:1898-1906
This paper presents a comprehensive study of the effect of poly(ethylene glycol) (PEG) degradation on the void formation known to take place sporadically at the interface between electroplated Cu and Pb-free solder. Thorough chemical analysis of our
Toward a Better Understanding of the Effect of Cu Electroplating Process Parameters on Cu3Sn Voiding
Publikováno v:
Journal of Electronic Materials. 41:302-312
“Kirkendall voiding” in the interfacial Cu3Sn intermetallic compound is often observed in solder joints made between Sn-containing alloys and Cu interconnect pads, during extended thermal aging or electromigration testing. It is commonly believed