Zobrazeno 1 - 10
of 64
pro vyhledávání: '"Francois Leverd"'
Publikováno v:
Advances in Patterning Materials and Processes XXXVII.
CMOS optical sensors performances are mainly driven by the quantum efficiency and the pixel cross talk. Microlens arrays implementation is a way to improve both by focalizing the incident light on the active photodiode area. Further optimizations inc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ece5ac376134bca70ec00247f89f404e
https://doi.org/10.1117/12.2551857
https://doi.org/10.1117/12.2551857
Autor:
P. Le Maitre, Pierre Bar, Frederic Boeuf, Stephane Monfray, Francois Leverd, D. Ristoiu, M. Binda, A. Daverio, Nathalie Vulliet, Sebastien Cremer, C. Durand, C. Deglise, Jean-Robert Manouvrier, Antonio Canciamilla, Angelica Simbula, Matteo Traldi, Mark Andrew Shaw, A. Bazzotti, Laurene Babaud, Antonio Fincato, Luca Ramini, Sébastien Jan, J.F. Carpentier, D. Goguet, Luca Maggi, P. Gambini, Charles Baudot
Publikováno v:
2019 IEEE International Electron Devices Meeting (IEDM).
A Silicon photonics platform operating at 100 Gbit/s (53Gbaud-PAM4) per lane is demonstrated. Integration of 60 GHz High-Speed Photodiode and efficient High-Speed Phase Modulator into a 400G-DR4 3D test chip is shown. Extension towards 400G-FR4 is ad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::30f9bd25008c9ccac36fe57f9e6da990
https://doi.org/10.1109/iedm19573.2019.8993627
https://doi.org/10.1109/iedm19573.2019.8993627
Autor:
Olivier Pollet, Francois Leverd, Nicolas Posseme, Maxime Garcia-Barros, Sébastien Barnola, Christian Arvet
Publikováno v:
Journal of Vacuum Science & Technology A. 38:033004
Using CH3F/O2/He based chemistries in high density plasmas for silicon nitride spacer etching, loss of silicon in active source/drain regions of CMOS transistors can be observed. Minimizing the so-called silicon recess during nitride spacer etching i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ece07c26f0b5c5524fd519628f5acd5a
https://doi.org/10.1116/1.5145158
https://doi.org/10.1116/1.5145158
Autor:
Olivier Pollet, G. Audoit, C. Guedj, Sébastien Barnola, Daniel Benoit, Maxime Garcia-Barros, Francois Leverd, Audrey Jannaud, Nicolas Posseme
Publikováno v:
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures, 2018, 36 (5), pp.052201. ⟨10.1116/1.5038617⟩
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures, American Vacuum Society (AVS), 2018, 36 (5), pp.052201. ⟨10.1116/1.5038617⟩
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures, 2018, 36 (5), pp.052201. ⟨10.1116/1.5038617⟩
Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures, American Vacuum Society (AVS), 2018, 36 (5), pp.052201. ⟨10.1116/1.5038617⟩
International audience; Spacer etching realization is considered today as one of the most critical processes for the fully depleted silicon on insulator devices realization. The challenge arises from the fact that low-k spacer needs to be introduced
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::25bad278b7bb95f625fbfd1e6f332c7e
https://cea.hal.science/cea-02185184/document
https://cea.hal.science/cea-02185184/document
Autor:
Frederic Boeuf, Sylvain Guerber, Daniel Benedikovic, Carlos Alonso-Ramos, Daniel Benoit, Delphine Marris-Morini, Laurent Vivien, D. Ristoiu, Xavier Le Roux, Diego Perez-Galacho, Sebastien Cremer, Laurene Babaud, Paul Chantraine, Charles Baudot, Nathalie Vulliet, Jonathan Planchot, Francois Leverd, Philippe Grosse
Publikováno v:
Silicon Photonics: From Fundamental Research to Manufacturing
We report on the co-integration of an additional passive layer within a Silicon Photonic chip for advanced passive devices. Being a CMOS compatible material, Silicon Nitride (SiN) appears as an attractive candidate. With a moderate refractive index c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3087ecdea1ffb013648d6a0a96502786
https://doi.org/10.1117/12.2306160
https://doi.org/10.1117/12.2306160
Autor:
Arnaud Tournier, L. Pinzelli, Francois Roy, D. Jeanjean, S. Hulot, F. Blanchet, Laurent Favennec, Didier Herault, C. Perrot, Francois Leverd, J.-P. Carrere, Helene Wehbe-Alause, S. Ricq, N. Cherault, P. Boulenc, C. Augier, Maxime Gatefait
Publikováno v:
physica status solidi c. 11:50-56
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ccb5297020f5ce92bdc127d234e5ce2
https://doi.org/10.1002/pssc.201300378
https://doi.org/10.1002/pssc.201300378
Autor:
Sébastien Barnola, Francois Leverd, Pierre Perreau, B. Orlando, Frederic Boeuf, D. Fleury, Gerard Ghibaudo, L. Clement, G. Bidal, Nicolas Loubet, Stephane Denorme, Remi Beneyton, Stephane Monfray, Thomas Skotnicki, A. Pouydebasque, Pascal Gouraud, J.-L. Huguenin, T. Salvetat
Publikováno v:
Solid-State Electronics. 54:883-889
This work presents an experimental study in order to evaluate the quality of transport in the most advanced state-of-the-art gate-all-around devices in term of performances. Experiments have been done on silicon channel devices with metal/high-k gate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b15447fc322b8864d7c7380048d76eb6
https://doi.org/10.1016/j.sse.2010.04.029
https://doi.org/10.1016/j.sse.2010.04.029
Autor:
Loan Pham-Nguyen, Stephane Denorme, P. Gros, Pascal Gouraud, Pierre Perreau, Sébastien Barnola, Sebastien Haendler, A. Margain, Y. Campidelli, F. Boedt, Olivier Weber, Christian Arvet, Daniel Delprat, J. Vetier, Francois Leverd, Remi Beneyton, C. Fenouillet-Beranger, C. Perrot, Tomasz Skotnicki, Stephane Monfray, Bich-Yen Nguyen, O. Faynot, F. Baron, Konstantin Bourdelle, C. de Buttet, A. Torres, Francois Andrieu, L. Pinzelli, L. Tosti, C. Borowiak, C. Laviron, F. Abbate
Publikováno v:
Solid-State Electronics. 54:849-854
In this paper we explore for the first time the impact of an ultra-thin BOX (UTBOX) with and without ground plane (GP) on a 32 nm fully-depleted SOI (FDSOI) high-k/metal gate technology. The performance comparison versus thick BOX architecture exhibi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a64d2a50140eb30c48a51e6e373d86d6
https://doi.org/10.1016/j.sse.2010.04.009
https://doi.org/10.1016/j.sse.2010.04.009
Autor:
Remi Beneyton, Simon Deleonibus, Sebastien Haendler, Pascal Gouraud, E. Deloffre, Tomasz Skotnicki, Claire Fenouillet-Beranger, Sébastien Barnola, C. Laviron, X. Garros, L. Tosti, P. Perreau, Nicolas Loubet, M. Casse, T. Salvetat, C. Leyris, Francois Leverd, Mickael Gros-Jean, P. Scheiblin, Francois Andrieu, F. Allain, Stephane Denorme, Loan Pham-Nguyen, Roland Pantel, C. Buj, L. Clement, O. Faynot, M. Marin
Publikováno v:
Solid-State Electronics. 53:730-734
In this paper we compare Fully-Depleted SOI (FDSOI) devices with different BOX (Buried Oxide) thicknesses with or without ground plane (GP). With a simple high-k/metal gate structure, the 32 nm devices exhibits Ion/Ioff performances well suited for l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ecf6801aa16c5c0167c65a7890dfc8a8
https://doi.org/10.1016/j.sse.2009.02.009
https://doi.org/10.1016/j.sse.2009.02.009
Autor:
Romain Wacquez, Philippe Coronel, A. Pouydebasque, S. Barnola, J. Bustos, Stephane Denorme, Didier Dutartre, Thomas Skotnicki, E. Deloffre, Nicolas Loubet, Francois Leverd
Publikováno v:
IEEE Transactions on Nanotechnology. 7:551-557
By introducing high-K dielectrics and metal gate in our planar self-aligned gate-all-around (GAA) fabrication process, we have successfully fabricated sub-35 nm CMOS devices that exhibit high-performance drive currents (2230/1000 muA/ mum for N/ P at
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::311e40fac10e1997aaba173d6c5a447d
https://doi.org/10.1109/tnano.2008.2002981
https://doi.org/10.1109/tnano.2008.2002981