Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Francois Kaess"'
Autor:
Cesar Henzelin, David Ruffieux, Daniel Severac, Steve Gyger, Budhaditya Banerjee, Nicola Scolari, Francois Kaess, Erwan Le Roux, Matteo Contaldo, Marc Morgan, Jean-Félix Perotto, V. Peiris, Thanh-Chau Le, Pascal Heim, Alexandre Vouilloz, Patrick Volet, Claude Arm, Daniel Sigg, Cedric Monneron, Frederic Giroud, Nicolas Raemy
Publikováno v:
ISSCC
Wireless Sensor Networks (WSN) and in particular Wireless Body Area Networks (WBAN) require long autonomy and miniature integrated solutions. While the autonomy in WSN is mostly limited by the energy consumption of the radio [1], WBAN rely on sensors
Autor:
Silvio Todeschini, Claude Arm, Ricardo Caseiro, J.-L. Nagel, Pierre-Francois Ruedi, Pascal Heim, Steve Gyger, Francois Kaess
Publikováno v:
ISSCC
Key elements for machine vision are the intra-scene dynamic range of the optical front-end, and a data representation that is as independent as possible from the illumination level. Furthermore, combining an optical front-end and a processor on the s
Autor:
Eric Grenet, Pierre-Francois Ruedi, Francois Kaess, Pascal Heim, Pascal Nussbaum, Steve Gyger, F. Heitger
Publikováno v:
Photonics in the Automobile.
A 128 x 128 pixels, 120 dB vision sensor extracting at the pixel level the contrast magnitude and direction of local image features is used to implement a lane tracking system. The contrast representation (relative change of illumination) delivered b
Publikováno v:
IEEE APCCAS 1998 1998 IEEE Asia-Pacific Conference on Circuits & Systems Microelectronics & Integrating Systems Proceedings (Cat No98EX242); 1998, p13-16, 4p
Publikováno v:
ISCAS'99 Proceedings of the 1999 IEEE International Symposium on Circuits & Systems VLSI (Cat No99CH36349); 1999, Issue 2, p322-322, 1p
Publikováno v:
Proceedings of 1997 IEEE International Symposium on Circuits & Systems Circuits & Systems in the Information Age ISCAS '97; 1997, Issue 1, p5-5, 1p
Design technology to address the new and vast problem of heterogeneous embedded systems design while remaining compatible with standard “More Moore” flows, i.e. capable of simultaneously handling both silicon complexity and system complexity, rep