Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Franck Montaudon"'
Publikováno v:
Proceedings of 17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, 2010, Greece. pp.894-897, ⟨10.1109/ICECS.2010.5724656⟩
ICECS
17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010
17th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010, 2010, Greece. pp.894-897, ⟨10.1109/ICECS.2010.5724656⟩
ICECS
Wide-band filterless RF front-ends are yet unpractical because of the stringent linearity requirements imposed by out-of-band blockers. A base-band to radio-frequency feedback receiver (BB-RF-FBRX) architecture is proposed in this paper, which reflec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cd504070ddf8c55f3084b64f8c5e968c
https://hal.archives-ouvertes.fr/hal-00579039
https://hal.archives-ouvertes.fr/hal-00579039
Publikováno v:
2009 IEEE Radio Frequency Integrated Circuits Symposium.
This paper presents the implementation of an undersampled LC bandpass ΣΔ ADC with a raised-cosine feedback DAC. It directly converts after the LNA a signal centered in the ISM band at 2.442GHz with a sampling frequency of 3.256GHz. This circuit has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::67a8d88f423d6f4ce770941377fd6222
https://doi.org/10.1109/rfic.2009.5135563
https://doi.org/10.1109/rfic.2009.5135563
Autor:
Sebastien Dedieu, Christian Corre, V. Carrat, Frederic Paillardet, Franck Montaudon, Ernesto Perea, Florent Sibille, Rayan Mina, S. Le Tual, Daniel Saias, E. Chataigner, J. Lajoinie, Loic Joet, R. Hossain
Publikováno v:
ISSCC
This paper describes a fully integrated scalable discrete-time receiver based on a merged SC mixer, filter and SAR ADC meeting the requirements of IEEE 802.16e and 802.11b/g/n standards. Recent work has shown the use of SC-filtering techniques in rad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fb220ad2913c6a55b7f4e9b1d2973df5
https://doi.org/10.1109/isscc.2008.4523207
https://doi.org/10.1109/isscc.2008.4523207
Autor:
Ernesto Perea, Laurent Chabert, Christian Corre, Loic Joet, Franck Montaudon, Rayan Mina, Daniel Saias, Franck Badets, Florent Sibille, Alessandro Dezzani, Frederic Bailleuil, Frederic Paillardet
Publikováno v:
2006 IEEE Asian Solid-State Circuits Conference.
A new discrete-time receiver architecture enables to specifically circumvent CMOS integration issues, taking advantage of ZIF architectures yet escaping impact of flicker noise and second-order front-end non-linearity. This architecture, compatible w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f09bde30a919236c8f91469873accfd
https://doi.org/10.1109/asscc.2006.357928
https://doi.org/10.1109/asscc.2006.357928
Autor:
G. Provins, A. Moutard, Franck Montaudon, Sebastien Dedieu, F. Bailleul, G. Wagner, J. Roux, Pierre Busson, E. Rouat, Eric Andre, Alessandro Dezzani, Daniel Saias, Frederic Paillardet, M. Bely
Publikováno v:
ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..
A DVB-T tuner is integrated in 0.12 /spl mu/m CMOS. The 16mm/sup 2/ chip integrates a double conversion chain including PLL, VCO, voltage regulators, and ADC. The receiver exhibits a 6.5dB NF, a VCO phase noise of -140dBc/Hz at 1MHz offset at 1.21GHz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b5c0055249231ef474f1669fc5fc74e
https://doi.org/10.1109/isscc.2005.1494053
https://doi.org/10.1109/isscc.2005.1494053
Autor:
Daniel Saias, Frederic Paillardet, G. Wagner, Eric Andre, M. Bely, E. Rouat, G. Provins, Sebastien Dedieu, Franck Montaudon, A. Moutard, Pierre Busson, Alessandro Dezzani, J. Roux, F. Bailleuil
Publikováno v:
The 3rd International IEEE-NEWCAS Conference, 2005..
A fully CMOS integrated DVB_T RF analog tuner achieving a 6.5 dB noise figure is presented. The tuner is implemented in a 0.12 mum CMOS process and occupies a 16 mm2 area. The receiver is based on a double zero IF conversion and integrates within the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1de26afc7e005531ec7c880111e17af0
https://doi.org/10.1109/newcas.2005.1496720
https://doi.org/10.1109/newcas.2005.1496720