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Autor: null Donohoe, Gregory W., Lyke James

Publikováno v: Aerospace Technologies Advancements

This talk describes research underway in the ECE Department to develop reconfigurable computing technology for spacecraft. Today’s spacecraft, whether Earth orbiters or planetary probes, serve primarily as sensing and communicating nodes. As sensor

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3416e7d9f4419498f36ee497287b684b
http://www.intechopen.com/articles/show/title/reconfigurable-computing-for-space

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Implementation of Reconfigurable Circuit with Watch-Points in the Hardware

Autor: A. Trinadha Rao, L. Srikanth, K Hari Kishore, V. Suresh, A. Murali

Publikováno v: Proceedings of 2nd International Conference on Micro-Electronics, Electromagnetics and Telecommunications ISBN: 9789811042799

This paper introduces the use of watch-points in the FPGA designs that creates the debugging environment. We described some designed techniques that can be automated and modified the watch-point logics using the debugging tools like Jbits and Jroute.

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::e437ba757b2bd10009d01ceeb01174ab
https://doi.org/10.1007/978-981-10-4280-5_69

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Applied Reconfigurable Computing

Autor: Luigi Carro, Koen Bertels, Antonio Carlos Schneider Beck, Stephan Wong

Publikováno v: Lecture Notes in Computer Science ISBN: 9783319562575
Applied Reconfigurable Computing

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::55bfe818d90b26505d6b5a6f30f47ec1
https://doi.org/10.1007/978-3-319-56258-2

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Fast Fourier Transform Implementation on FPGA Using Soft-Core Processor NIOS II

Autor: Mahesh T. Kolte, Poonam S. Isasare

Publikováno v: International Journal of Engineering Trends and Technology. 10:411-414

FPGAs with soft-core processors offer the opportunity for testing & implementation various trade-offs between hardware and software implementations of the functions to implement. With the Altera NIOS II the processor can be customized through the add

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::4d3ee3d4c624007bf675df6abdd3236b
https://doi.org/10.14445/22315381/ijett-v10p278

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An Overview of Reconfigurable Hardware for Efficient Implementation of DSP Algorithms

Autor: Mahesh Kadam, Kishor G Sawarkar

Publikováno v: IOSR Journal of Engineering. 4:34-43

Reconfigurable hardware is emerging as the best option for the efficient implementation of complex and computationally expensive signal processing algorithms. Reconfigurable hardware exploits the benefit of high of computational efficiency of hardwar

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::80c4eb2865251b5a7134654436296f8c
https://doi.org/10.9790/3021-04253443

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Comparison of High Level FPGA Hardware Design for Solving Tri-diagonal Linear Systems

Autor: Neil A. Kelson, David J. Warne, Ross Hayward

Publikováno v: ICCS

Reconfigurable computing devices can increase the performance of compute intensive algorithms by implementing application specific co-processor architectures. The power cost for this performance gain is often an order of magnitude less than that of m

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a701a074c1704400905971d477a646ef

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Digital Controller Development Methodology Based on Real-Time Simulations with LabVIEW FPGA Hardware-Software Toolset

Autor: Paolo Mattavelli, Tommaso Caldognetto, Simone Buso

Publikováno v: Electronics, Vol 17, Iss 2, Pp 110-117 (2013)

In this paper, we exemplify the use of NI Lab-VIEW FPGA as a rapid prototyping environment for digital controllers. In our power electronics laboratory, it has been successfully employed in the development, debugging, and test of different power conv

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::535aa3e62f29015a8e378f0826e4bd5c
http://electronics.etfbl.net/journal/Vol17No2/xPaper_07.pdf

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C-Based Complex Event Processing on Reconfigurable Hardware

Autor: Takashi Takenaka, Hiroaki Inoue, Masato Motomura

Publikováno v: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 21:971-974

This brief presents an efficient complex event-processing framework, designed to process a large number of sequential events on field-programmable gate arrays (FPGAs). Unlike conventional structured query language based approaches, our approach featu

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::020450dda560f6d3b3c2c502c118609e
https://doi.org/10.1109/tvlsi.2012.2197230

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Reconfigurable Computer Systems Based on Virtex-6 and Virtex-7 FPGAs

Autor: L.M. Slasten, Ilya I. Levin, Igor A. Kalyaev, Alexey I. Dordopulo

Publikováno v: PDeS

In the paper we consider computational modules Saiph and Rigel designed on the base of Xilinx Virtex-6 FPGAs and a computational module 24V7-750 based on Xilinx Virtex-7 FPGAs which is now in the design phase. The computational modules are intended f

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::7e87d01d34053c96c751f6bf3370f3b3
https://doi.org/10.3182/20130925-3-cz-3023.00009

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