Using integer linear programming for correctly rounded multipartite architectures

Autor: Oregane Desrentes, Florent de Dinechin

Publikováno v: FPT 2022-International Conference on Field Programmable Technology
FPT 2022-International Conference on Field Programmable Technology, Dec 2022, Hong Kong, China

International audience; This article introduces several improvements to the multipartite method, a generic technique for the hardware implementation of numerical functions. A multipartite architecture replaces a table of value with several tables and

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ae9723fd5fbc226ea7d0c9b52a29ef52
https://inria.hal.science/hal-03844218/document

Low-precision logarithmic arithmetic for neural network accelerators

Autor: Maxime Christ, Florent De Dinechin, Frederic Petrot

Publikováno v: 33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022)
33rd IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP 2022), IEEE, Jul 2022, Gothenburg, Sweden. ⟨10.1109/ASAP54787.2022.00021⟩

International audience; Resource requirements for hardware acceleration of neural networks inference is notoriously high, both in terms of computation and storage. One way to mitigate this issue is to quantize parameters and activations. This is usua

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3fb938c89271394961029a6dfc26bab3
https://inria.hal.science/hal-03684585/file/LNSNeuron_asap2022.pdf

Application-Specific Arithmetic in High-Level Synthesis Tools

Autor: Victor Lezaud, Yohann Uguen, Florent de Dinechin, Steven Derrien

Publikováno v: ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization, 2020, ⟨10.1145/3377403⟩
ACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2020, ⟨10.1145/3377403⟩

This work studies hardware-specific optimization opportunities currently unexploited by high-level synthesis compilers. Some of these optimizations are specializations of floating-point operations that respect the usual semantics of the input program

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4514986b1453239f555a40785920a010
https://doi.org/10.1145/3377403

Resource Optimal Truncated Multipliers for FPGAs

Autor: Martin Kumm, Andreas Bottcher, Florent de Dinechin

Publikováno v: ARITH
ARITH 2021-28th IEEE International Symposium on Computer Arithmetic
ARITH 2021-28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8
ARITH 2021-28th IEEE International Symposium on Computer Arithmetic, Jun 2021, Torino, Italy. pp.1-8, ⟨10.1109/ARITH51176.2021.00029⟩

International audience; This proposal presents the resource optimal design of truncated multipliers targeting field programmable gate arrays (FPGAs). In contrast to application specific integrated circuits (ASICs), the design for FPGAs has some disti

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1177a885fcbf38856c1f76c3d6f8f891
https://doi.org/10.1109/arith51176.2021.00029

Application-Specific Arithmetic : Computing Just Right for the Reconfigurable Computer and the Dark Silicon Era

Autor: Florent de Dinechin, Martin Kumm

Written by two experts of the domain, this book presents the most recent advances in computer arithmetic hardware, with a focus on application-specific arithmetic beyond the classic operators and the standard precisions. It targets silicon designers