Zobrazeno 1 - 1
of 1
pro vyhledávání: '"FlexHtree"'
Publikováno v:
Dianzi Jishu Yingyong, Vol 44, Iss 8, Pp 5-9 (2018)
For high performance CPU design, especially on 16 nm and advanced process nodes, with the increase in the number of signoff corner, increasing the clock common path, improving the clock latency correlation on various RC corners, decreasing local skew
Externí odkaz:
https://doaj.org/article/0b8197f9bd0840c29b69e2ab9234e538
