Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Fatemeh Vardi"'
Publikováno v:
International Journal of Information and Communication Technology Research, Vol 9, Iss 2, Pp 1-9 (2017)
Complex homogeneous network-on-chip or heterogeneous network-on-chip increases the need of determining and developing simulation tools for designer to evaluate and comparison network performance. Towards this end, ARTEMIS tool, a matlab based simulat
Externí odkaz:
https://doaj.org/article/6d81193dbc874f1aa715cf74c8c8c527
Publikováno v:
The Journal of Supercomputing. 78:10906-10929
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb06ffb77d9451c59b68b911ce2ce728
https://doi.org/10.1007/s11227-021-04272-8
https://doi.org/10.1007/s11227-021-04272-8
Publikováno v:
The Journal of Supercomputing. 73:2098-2129
Network-on-chip (NoC) is a promising paradigm for efficient communication between the processing elements inside multi-core system-on-chip (SoC) and general purpose chip-multi-processor. Choosing appropriate topology for NoCs with predefined applicat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e9df9a31d7aa26dfb4ea2792fefae2d1
https://doi.org/10.1007/s11227-016-1905-6
https://doi.org/10.1007/s11227-016-1905-6
Publikováno v:
IEICE Electronics Express. 6:1737-1744
In this paper, a heuristic mapping algorithm which maps tasks, using priority lists and the crinkle moving pattern is proposed. To evaluate this algorithm, a set of real (i.e. Video Object Plan Decoder) and random applications have been used and the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cbcabba2af2b8f1432d82dc872b9a5cb
https://doi.org/10.1587/elex.6.1737
https://doi.org/10.1587/elex.6.1737
Publikováno v:
2009 Second International Conference on Computer and Electrical Engineering.
System on Chip is a system consists of a number of intellectual property cores (IP cores) which are connected together utilizing electrical bus technology. When the number of IP cores increases, Network on Chip (NoC) architectures with regular topolo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ab7c9833f951e018b69aef9eb018c0c4
https://doi.org/10.1109/iccee.2009.185
https://doi.org/10.1109/iccee.2009.185