Zobrazeno 1 - 10
of 37
pro vyhledávání: '"Farshid Aryanfar"'
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 67:3798-3820
A $4 \times 11$ bit 1-GS/s 40-mW collaborative analog-to-digital converter (ADC) is presented in a 65-nm CMOS for a four-channel multiple-input and multiple-output (MIMO) receiver. This work extends the maximal-ratio-combining (MRC) approach to defin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::212f96bbad132202df2f78f1c2026178
https://doi.org/10.1109/tmtt.2019.2916788
https://doi.org/10.1109/tmtt.2019.2916788
Autor:
Farshid Aryanfar, Philip Hisayasu, Amlan Nag, Masum Hossain, Waleed El-Halwagy, Pedram Mousavi
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 65:396-413
This paper introduces a quadrature fractional-N cascaded frequency synthesizer and its phase noise analysis, optimization, and design for future 5G wireless transceivers. The performance improvement of the cascaded phase-locked loop (PLL) over single
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95e3f42d46caf0e1e7b85356ccb483f0
https://doi.org/10.1109/tmtt.2016.2647698
https://doi.org/10.1109/tmtt.2016.2647698
Publikováno v:
IET Microwaves, Antennas & Propagation, vol 10, iss 10
The authors present the design and development of a two stage Doherty power amplifier (DPA) in the Ka-band. The amplifier is fabricated in a 0.15-μm gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (pHEMT) process. The DPA has
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b4e0e884386453e89d69c5311444fa0c
https://doi.org/10.1049/iet-map.2015.0818
https://doi.org/10.1049/iet-map.2015.0818
Publikováno v:
IEEE Journal of Solid-State Circuits. 50:490-502
A fast-wakeup bang-bang LC digital phase-locked loop (DPLL) suitable for low-power wireline applications is presented. The PLL uses a novel oscillator design to generate eight output phases using magnetic coupling. The fast-wakeup feature improves po
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e7e57c019f0ea6a9833610b3846f69b9
https://doi.org/10.1109/jssc.2014.2361351
https://doi.org/10.1109/jssc.2014.2361351
Publikováno v:
Nguyen, DP; Pham, AV; & Aryanfar, F. (2016). A K-Band High Power and High Isolation Stacked-FET Single Pole Double Throw MMIC Switch Using Resonating Capacitor. IEEE Microwave and Wireless Components Letters, 26(9), 696-698. doi: 10.1109/LMWC.2016.2597235. UC Davis: Retrieved from: http://www.escholarship.org/uc/item/8jf644fg
IEEE Microwave and Wireless Components Letters, vol 26, iss 9
IEEE Microwave and Wireless Components Letters, vol 26, iss 9
A K-band monolithic microwave integrated circuit (MMIC) transmit and receive (T/R) single pole double throw (SPDT) switch with low insertion loss, high isolation and ultra-high output power is demonstrated using 0.15- $\mu\text{m}$ Gallium Arsenide (
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::18666165cd8a9a064bcd780c33696d37
https://doi.org/10.1109/lmwc.2016.2597235
https://doi.org/10.1109/lmwc.2016.2597235
Publikováno v:
2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
A 4×11-bit 1 GS/s 40 mW Collaborative ADC in 65nm CMOS is presented for a 4-Ch MIMO receiver. It utilizes the correlation information between channels to perform energy efficient digitization of received signals. By utilizing 8 SAR units each with 6
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::69453c1c195ba116322f5302ab84a72e
https://doi.org/10.1109/rfic.2017.7969032
https://doi.org/10.1109/rfic.2017.7969032
Autor:
Won-Il Roh, Byunghwan Lee, Kyungwhoon Cheun, Jae-Weon Cho, Ji-Yun Seol, Farshid Aryanfar, Jae-kon Lee, Jeong-Ho Park, Yung-soo Kim
Publikováno v:
IEEE Communications Magazine. 52:106-113
The ever growing traffic explosion in mobile communications has recently drawn increased attention to the large amount of underutilized spectrum in the millimeter-wave frequency bands as a potentially viable solution for achieving tens to hundreds of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0c17915cf36f0ce7371771f5cc353753
https://doi.org/10.1109/mcom.2014.6736750
https://doi.org/10.1109/mcom.2014.6736750
Publikováno v:
IEEE Journal of Solid-State Circuits. 48:2775-2784
A fully integrated broadband power amplifier (PA) is implemented in a standard 45-nm CMOS SOI technology. The PA is designed using a dynamically biased stacked SOI transistor approach, which constructively adds drain-source voltage signals of individ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c8c96913c1823f1a1d72dbf7dbecf05
https://doi.org/10.1109/jssc.2013.2276135
https://doi.org/10.1109/jssc.2013.2276135
Autor:
Amlan Nag, Philip Hisayasu, Pedram Mousavi, Waleed El-Halwagy, Farshid Aryanfar, Masum Hossain
Publikováno v:
2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
A 26–32GHz quadrature cascaded phase locked loop (PLL) is presented. The PLL is implemented in 65nm bulk CMOS, consuming 27mW and has less than 100fsec integrated jitter with −114.4 and −112.6dBc/Hz phase noise at 1MHz offset for integer and fr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39329c015d1040c4cba55bc270684742
https://doi.org/10.1109/rfic.2016.7508265
https://doi.org/10.1109/rfic.2016.7508265
Publikováno v:
2016 IEEE MTT-S International Microwave Symposium (IMS).
We present the design and measured results of a fully integrated Ka-Band front end on a 0.15-µm GaAs pHEMT process. The integrated front end includes a three stage power amplifier, three stage low noise amplifier, and single pole, double throw switc
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68cd58694ff1c3fa432adbf588be57bf
https://doi.org/10.1109/mwsym.2016.7540314
https://doi.org/10.1109/mwsym.2016.7540314