Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Fang Jingxun"'
Publikováno v:
2020 China Semiconductor Technology International Conference (CSTIC).
In soak and spike anneal process, applied materials vantage family tools are widely used in 28/40nm and beyond. The domestic machines of this kind, being still on the stage of development, have a great potentiality in the semiconductor industry. As a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3ae2579d9341526ccab00a8948db9282
https://doi.org/10.1109/cstic49141.2020.9282456
https://doi.org/10.1109/cstic49141.2020.9282456
Autor:
Fang Jingxun, Luo Zhigang, Albert Pang, Gong Yiqi, Wei Xiang, Xiang Guangxin, Zhou Haifeng, Bao Yu
Publikováno v:
2019 China Semiconductor Technology International Conference (CSTIC).
In this paper, problems and solutions for bump defect due to the stopper-SiCN layer and scrubber are investigated, and the mechanism of the defect by SiCN is clarified. In the 28 nm node flow, it is found that skipping SiCN layer scrubber and increas
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f6c5bc3b305d91687582d93e9dfaec02
https://doi.org/10.1109/cstic.2019.8755607
https://doi.org/10.1109/cstic.2019.8755607
Autor:
Jianghua Leng, Bao Yu, Zhenhua Cai, Lin Gao, Ying Gao, Wei Hu, Peng Tian, Gang Shi, Haifeng Zhou, Fuchun Xi, Yang Zhigang, Baojun Zhao, Yanyan Zhang, Liu Yingming, Fang Jingxun
Publikováno v:
2017 China Semiconductor Technology International Conference (CSTIC).
In this paper, the influence of Copper (Cu) barrier and seed process tuning on step coverage was analyzed. TEM images show relatively thinner barrier can improve the opening CD of a metal line structure hence improve the sidewall coverage of Cu seed.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d53520b762c1cb521ccd27808aef0a6
https://doi.org/10.1109/cstic.2017.7919808
https://doi.org/10.1109/cstic.2017.7919808
Autor:
Gang Shi, Haifeng Zhou, Fang Jingxun, Yanyan Zhang, Zhong Bin, Kang Ye, Lin Gao, Liu Yingming, Bao Yu
Publikováno v:
2017 China Semiconductor Technology International Conference (CSTIC).
As the dimensions of middle-of-line (MOL) contacts shrink, the tungsten (W) gap-filling capability becomes more critical to eliminate function failure in SRAM and logic circuit caused by W-voids. The formation of W-voids is generally related to conta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::43296c2d41591e189e17ded2965b0d83
https://doi.org/10.1109/cstic.2017.7919809
https://doi.org/10.1109/cstic.2017.7919809
Publikováno v:
2015 China Semiconductor Technology International Conference.
TiN metal hard mask (MHM) scheme has become necessary in Cu interconnects when ultra-low k (ULK) materials is introduced. As scale down, the biggest challenge of MHM scheme is how to control the residual stress of TiN layer as the poor mechanical str
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd1e432023cd85431080dd12dbc789ad
https://doi.org/10.1109/cstic.2015.7153414
https://doi.org/10.1109/cstic.2015.7153414
Autor:
Albert Pang, Fang Jingxun, Jing Xubin, Cao Wenjie, He Zhibin, Liu Wei, Qiu Yuming, Yu Deqin, Xiao Tianjin
Publikováno v:
2015 China Semiconductor Technology International Conference.
For 40nm technology node, the Nickel Silicide process is widely used due to advantages such as low silicon consumption and low stress. In the meantime, a pre-amorphous implantation is necessary for Nickel Silicide formation to eliminate dislocations
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b84c60568c7c797bbb28d95606cac78
https://doi.org/10.1109/cstic.2015.7153336
https://doi.org/10.1109/cstic.2015.7153336
Autor:
Lei Tong, Bao Yu, Sang Ningbo, Zhou Xiaoqiang, Zhou Jun, Li Runling, Fang Li, Zhong Bin, Gang Shi, Ding Yi, Haifeng Zhou, Fang Jingxun, Yi Hailan
Publikováno v:
2015 China Semiconductor Technology International Conference.
In this paper, a conception of Dep-Etch-Dep was proposed to extend the gap-fill capability of High Aspect Ratio Process (HARP) for Shallow Trench Isolation (STI) at 28nm node. Silicon oxide liner deposited by Atom Layer Deposition (ALD), which has no
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e06cbb9d3b789d553c35012cf60191c
https://doi.org/10.1109/cstic.2015.7153405
https://doi.org/10.1109/cstic.2015.7153405
Akademický článek
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Autor:
Zhang, Liang, Fang, Jingxun, Mao, Zhibiao, Huang, Hai, Li, Fang, Yan, Junhua, Yu, Shirui, Huang, Jun, Zhao, Long, Zhang, Huijun, Chen, Fei, Leng, Jianghua, Zhu, Y. F., Jing, Xubin, Yu, Liujiang, Zhang, Yu, Cao, Yongfeng, Pang, Albert
Publikováno v:
ECS Transactions; March 2013, Vol. 52 Issue: 1
Publikováno v:
ECS Transactions; March 2013, Vol. 52 Issue: 1