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of 94
pro vyhledávání: '"Fallah, Farzan"'
Autor:
Fallah, Farzan
Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
Includes bibliographical references (leaves 157-160 ).
With the rapid increase in the number of transistors that can be fabri
Includes bibliographical references (leaves 157-160 ).
With the rapid increase in the number of transistors that can be fabri
Externí odkaz:
http://hdl.handle.net/1721.1/9463
Autor:
Fallah, Farzan
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1996.
Includes bibliographical references (leaves 53-54).
by Farzan Fallah.
M.S.
Includes bibliographical references (leaves 53-54).
by Farzan Fallah.
M.S.
Externí odkaz:
http://hdl.handle.net/1721.1/38822
Autor:
Ishihara, Tohru, Fallah, Farzan
Publikováno v:
Dans Design, Automation and Test in Europe - DATE'05, Munich : Allemagne (2005)
This paper presents a technique for eliminating redundant cache-tag and cache-way accesses to reduce power consumption. The basic idea is to keep a small number of Most Recently Used (MRU) addresses in a Memory Address Buffer (MAB) and to omit redund
Externí odkaz:
http://arxiv.org/abs/0710.4703
Autor:
Fallah, Farzan, Mirshekari, Bahram, Pirdashti, Hemmatollah, Farahvash, Farhad, Nouri, Mohammad-Zaman
Publikováno v:
Russian Agricultural Sciences; Aug2022, Vol. 48 Issue 4, p244-253, 10p
Publikováno v:
ESTIMedia2006. 1:59-64
This paper proposes an energy characterization framework which helps designers in developing a fast and accurate energy model for a target processor-based system. We use a linear model for energy estimation and we find the coefficients of the model u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=jairo_______::f4321237ec8e1bafd94838d2994f4a47
http://hdl.handle.net/2324/6347
http://hdl.handle.net/2324/6347
Autor:
Fallah, Farzan
Publikováno v:
情報処理学会研究報告. 2006(124):109-114
マイクロプロセッサの消費エネルギーを高い抽象度でキャラクタライズする手法を提案する。消費エネルギーのモデルには線形式を用いる。本稿におけるキャラクタライズとは、線形式
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=jairo_______::ffb4051f4359835969369b2bcb6515b2
http://hdl.handle.net/2324/6315
http://hdl.handle.net/2324/6315
Autor:
Fallah, Farzan
Publikováno v:
情報処理学会研究報告. 2005(102):179-184
製造上の欠陥を含むチップであっても、欠陥箇所がチップの機能に影響を与えないように無効化することにより良品チップとして使用することができる。鍵となるアイデアは、いくつか
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=jairo_______::8b611580acb4c41b2b9277682946f307
http://hdl.handle.net/2324/6256
http://hdl.handle.net/2324/6256
Autor:
Ishihara, Tohru, Fallah, Farzan
Publikováno v:
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..
Yield improvement through exploiting fault-free sections of defective chips is a well-known technique [1][2]. The idea is to partition the circuitry of a chip in a way that faultfree sections can function independently. Many fault tolerant techniques
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c3a99a620bfef892a2aba8a9cbf7b19a
https://doi.org/10.1109/iccad.2005.1560207
https://doi.org/10.1109/iccad.2005.1560207