Zobrazeno 1 - 10
of 37
pro vyhledávání: '"F.T. Brady"'
Publikováno v:
IEEE Transactions on Nuclear Science. 46:1836-1840
Shallow trench isolation (STI) is rapidly replacing LOCOS (LOCal Oxidation of Silicon) as the device isolation process of choice. However, little work has been done to characterize the radiation-hardness capability of devices built with STI. In this
Publikováno v:
IEEE Transactions on Nuclear Science. 45:2436-2441
1M SRAMs were fabricated on fully-depleted SOI using 0.5 um design rules. The SRAMs were evaluated for speed/power, prompt dose upset, SEE, and total dose hardness. As compared to the identical design fabricated on bulk CMOS, improved results were se
Publikováno v:
IEEE Transactions on Electron Devices. 44:972-977
An experimental study has been conducted of the design tradeoffs of fully-depleted (FD) accumulation mode Silicon-on-Insulator (SOI) MOSFET's with regard to hot carrier reliability, single transistor latch-up and device performance. Three drain desig
Publikováno v:
IEEE Transactions on Nuclear Science. 43:2646-2650
A total dose hardening treatment is applied to SIMOX buried oxides. Total ionizing dose radiation testing is performed on fully-depleted transistors Fabricated on both hardened and non-hardened substrates. At 200 krads X-ray dose, the front gate shif
Publikováno v:
IEEE Transactions on Nuclear Science. 41:2304-2309
Using fully-depleted technology, the Loral 256K SOI SRAM has demonstrated under worst case SEU and prompt dose testing an LET threshold of at least 80 MeV cm/sup /spl and/2//mg, and a prompt dose rate upset level of greater then 4E10 rad(Si)/s, respe
Publikováno v:
IEEE Transactions on Nuclear Science. 37:1995-2000
For SOI (silicon-on-insulator) materials formed by oxygen implantation (the SIMOX method), the charge trapping properties of the buried oxide layer are of particular interest. The aim is to examine the effects of changing the various SIMOX process pa
Publikováno v:
Solid-State Electronics. 33:1643-1646
Circuits built on silicon-on-insulator (SOI) substrates, have different requirements for material quality, depending on the intended application. Thus, the need exists for a detailed characterization of the electrical properties of the silicon and bu
Publikováno v:
IEEE International SOI Conference.
Publikováno v:
IEEE SOS/SOI Technology Conference.
The use of the quick-turn (QT) method of forming a simple buried-oxide capacitor (BOXCAP) to characterize the effects of process variations on the properties of the oxide and silicon layers is discussed. In particular, the results of a matrix of vari
Publikováno v:
Proceedings. SOS/SOI Technology Workshop.
A detailed study of detects and buried-oxide interface properties has been made on SOI devices fabricated from SIMOX (separation of implantation of oxygen) wafers implanted by Eaton NV-200 in 1986 and devices built from more recently acquired wafers.