Zobrazeno 1 - 10
of 35
pro vyhledávání: '"F.M. Rotella"'
Publikováno v:
IEEE Transactions on Electron Devices. 59:20-25
In this paper, we critically compare two techniques for the parametrization of silicon-on-sapphire MOSFETs' high-frequency small-signal equivalent circuit and discuss the scalability of high-frequency equivalent circuit parameters. We demonstrate tha
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::38ef6b598fe198189f2d584f9fd52ae1
https://doi.org/10.1109/ted.2011.2170426
https://doi.org/10.1109/ted.2011.2170426
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:1089-1099
This work addresses the device modeling challenges of production-quality, state-of-the-art, silicon-on-sapphire (SOS) processes. Differences between SOS, silicon-on-insulator (SOI), and bulk CMOS are highlighted, with emphasis on the key differences
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::731923d3a5a30a1893ea744dbdf419da
https://doi.org/10.1109/jssc.2011.2118270
https://doi.org/10.1109/jssc.2011.2118270
Autor:
M. Wiklund, Y. Okaniwa, Y. Mizutani, William W. Walker, Nestor Tzartzanis, H. Tamura, F.M. Rotella, Tadahiro Kuroda, Junji Ogawa, Nikola Nedovic
Publikováno v:
IEEE Journal of Solid-State Circuits. 42:2726-2735
A CMOS CDR and 1:16 DEMUX fabricated in a low-cost 90 nm bulk CMOS process operates at 40-44 Gb/s and dissipates 910 mW. A quarter-rate hybrid phase-tracking/3times blind-oversampling architecture is used to improve jitter tolerance, reduce the need
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::098ca088182b08fc4220bc5fc60055e8
https://doi.org/10.1109/jssc.2007.908714
https://doi.org/10.1109/jssc.2007.908714
Autor:
Tero Tapio Ranta, Richard Whatley, F.M. Rotella, Vikram Sekar, Alper Genc, Chih-Chieh Cheng, Chang Zeng
Publikováno v:
2015 IEEE 15th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.
This paper compares insertion loss, harmonics and Q-factor of sapphire, trap-rich silicon and high-resistivity silicon substrates. The concept of substrate characteristic frequency is shown to be useful metric to evaluate substrate behavior. New meth
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cd40e03216f3603d0851b731640712b5
https://doi.org/10.1109/sirf.2015.7119867
https://doi.org/10.1109/sirf.2015.7119867
Autor:
D. Howard, F.M. Rotella, R. Divecha, Andy Brotman, B.K. Bhattacharya, M. Matloubian, V. Blaschke, P. Singh, P. Miliozzi, K. Lampaert, Yuhua Cheng, Marco Racanelli, Peter J. Zampardi
Publikováno v:
IEEE Transactions on Electron Devices. 52:1429-1441
We present a broad-band lumped element planar inductor model that is suitable for RFIC design in silicon technologies. We provide extensions of the modeling methodology to similar components such as differential inductors, baluns, and solenoid induct
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::716bd32bec6241234aa46bb46f699da0
https://doi.org/10.1109/ted.2005.850635
https://doi.org/10.1109/ted.2005.850635
Publikováno v:
IEEE Transactions on Microwave Theory and Techniques. 48:991-999
This paper describes how device simulation may be used for the modeling, analysis, and design of radio-frequency (RF) laterally diffused metal-oxide-semiconductor (LDMOS) transistors. Improvements to device analysis needed to meet the requirements of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2ba6bc2288445652ec2affce55d89304
https://doi.org/10.1109/22.904736
https://doi.org/10.1109/22.904736
Publikováno v:
IEEE 2011 International SOI Conference.
1/ƒ noise measured up to a frequency of 10 MHz is compared for fully depleted MOSFETS on epitaxial silicon grown directly on sapphire and silicon bonded to sapphire for 0.35 um technology.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d9c0fe757308e74caece3f6b4284e012
https://doi.org/10.1109/soi.2011.6081692
https://doi.org/10.1109/soi.2011.6081692
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 5:368-372
The methodology, implementation, and results of a design for manufacturing (DFM) technique as applied to an integrated circuit boron base formation for an n-p-n transistor are presented. The primary purpose of the DFM technique is to achieve acceptab
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4eb94b164521add589efa20e59dd1344
https://doi.org/10.1109/66.175369
https://doi.org/10.1109/66.175369
Autor:
Hirotaka Tamura, Nestor Tzartzanis, Y. Okaniwa, M. Wiklund, Y. Mizutani, F.M. Rotella, Tadahiro Kuroda, Junji Ogawa, William F. Walker, Nikola Nedovic
Publikováno v:
ISSCC
A 3times oversampling CDR and 1:16 DEMUX occupies 0.8 times 1.8mm2 in a 90nm CMOS process. The chip operates at 40 to 44Gb/s and dissipates 0.91W. Input data is sampled using a 24-phase distributed VCO and a digital CDR recovers 16 bits and a 2.5GHz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e84939ec731fe30eea18ac1d500c5b34
https://doi.org/10.1109/isscc.2007.373375
https://doi.org/10.1109/isscc.2007.373375
Publikováno v:
Digest. International Electron Devices Meeting.
A new broad-band scalable spiral inductor model incorporating skin effect, substrate loss, and proximity effect is presented. The construction of the lumped element model using analytic expressions is described and the model is validated with data fr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1069b2d2bbac0ee65e6d55b03afb157e
https://doi.org/10.1109/iedm.2002.1175881
https://doi.org/10.1109/iedm.2002.1175881