Zobrazeno 1 - 10
of 29
pro vyhledávání: '"F.C. Tseng"'
Publikováno v:
Microelectronics Reliability. 44:1233-1243
In this paper, some practical considerations for effective and efficient wafer-level reliability control (WLRC) are presented. We propose a better solution to replace the previous method by adding a protection diode to avoid process induced charging
Publikováno v:
IEEE Transactions on Instrumentation and Measurement. 52:1458-1467
Wafer-level reliability (WLR) testing receives much attention and becomes a major tool for process reliability qualification and in-line monitoring because WLR can provide real-time results for timely improvements. This in-situ test capability is gre
Publikováno v:
Microelectronics Reliability. 43:713-724
This paper depicts the improvement of poly-silicon (poly-Si) holes induced failures during gate oxide integrity (GOI) voltage-ramp (V-Ramp) tests by replacing plasma enhanced oxidation with silicon rich oxidation (SRO), which is cap oxide on transfer
Publikováno v:
IEEE Transactions on Electron Devices. 41:692-697
Some anomalous behaviors, such as punchthrough voltage reduction, leakage current increase, and transconductance (g/sub m/) instability have been found in BF/sub 2/ implanted p/sup +/-polysilicon P-MOSFET's. These effects are supposed to be due to B-
Publikováno v:
Solid-State Electronics. 33:1151-1154
Etching following re-oxidation (commonly called rounding-off oxidation) and oxide/nitride/oxide (ONO) dielectrics were used to improve the breakdown characteristics of trench capacitors fabricated by RIE processing. These improved trench capacitors w
Publikováno v:
Thin Solid Films. 185:363-371
The flow angle is an important characteristic of borophosphosilicate (BPSG) films. In this work the effects of chemical compositions and various film post-growth treatments, namely delay time, deionized water rinse and flow ambients, on the flow angl
Publikováno v:
IEEE International Integrated Reliability Workshop Final Report, 2004.
An innovative multi-via test structure is developed for the isothermal electromigration (Iso-EM) test, which is a well-known wafer-level reliability (WLR) test methodology. The proposed test structure consists of a metal line with more than one via a
Autor:
F.C. Tseng
Publikováno v:
1999 Symposium on VLSI Circuits. Digest of Papers (IEEE Cat. No.99CH36326).
TSMC started the dedicated foundry industry 12 years ago. This not only accelerated the disintegration trend in the semiconductor industry, but also has created a multi-billion dedicated foundry business today. In next decade, foundry paradigm is exp
Publikováno v:
International Symposium on VLSI Technology, Systems and Applications.
The effects of various borophosphosilicate glass (BPSG) film postgrowth treatments on the film after-flow angles have been explored with ESCA (electron spectroscopy for chemical analysis) and FTIR (Fourier transform infrared spectroscopy). The experi
Publikováno v:
IEEE Transactions on Electron Devices. 41:458-460
Different post oxide annealing technologies, i.e. furnace and/or RTA were done in borophosphosilicate glass (BPSG) films under flow and reflow. It is found that the threshold voltage shift is apparent in P-MOSFET but small in N-MOSFET for a device wi