Multiplication by rational constants: LIP research report 2011-3

Autor: F. de Dinechin

Publikováno v: IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing
IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, 2012, pp.00. ⟨10.1109/TCSII.2011.2177706⟩
IEEE Transactions on Circuits and Systems Part 2 Analog and Digital Signal Processing, Institute of Electrical and Electronics Engineers (IEEE), 2012, pp.00. ⟨10.1109/TCSII.2011.2177706⟩

International audience; Multiplications by simple rational constants often appear in fixed-point or floating-point application code, for instance in the form of division by an integer constant. The hardware implementation of such operations is of pra

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::517cae2bb9103bde83534fb358b108f6
https://doi.org/10.1109/tcsii.2011.2177706

An FPGA architecture for solving the Table Maker's Dilemma

Autor: Bogdan Pasca, Alexandru Plesco, Jean-Michel Muller, F. de Dinechin

Publikováno v: Proceedings of the 22nd IEEE International Conference on Application-specific Systems, Architectures and Processors
Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on
Application-Specific Systems, Architectures and Processors (ASAP), 2011 IEEE International Conference on, Sep 2011, Santa Monica, United States. pp.187-194, ⟨10.1109/ASAP.2011.6043267⟩
ASAP

Cet article a obtenu le "best paper award" de la conférence; International audience; Solving the Table Maker's Dilemma, for a given function and a given target floating-point format, requires testing the value of the function, with high precision, a

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2474f6f370e005dadf48618e64b374b0
https://hal-ens-lyon.archives-ouvertes.fr/ensl-00640063/document

An FPGA-specific approach to floating-point accumulation and sum-of-products

Autor: F. de Dinechin, Radu Tudoran, Bogdan Pasca, Octavian Cret

Publikováno v: FPT
The 2008 International Conference on Field-Programmable Technology
Field-Programmable Technology
Field-Programmable Technology, Dec 2008, Taipei, Taiwan

This article studies two common situations where the flexibility of FPGAs allows one to design application-specific floating-point operators which are more efficient and more accurate than those offered by processors and GPUs. First, for applications

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ed13527597c9de500ac5aedf90dead3e
https://doi.org/10.1109/fpt.2008.4762363

Floating-Point Trigonometric Functions for FPGAs

Autor: F. de Dinechin, Jérémie Detrey

Publikováno v: FPL

Field-programmable circuits now have a capacity that allows them to accelerate floating-point computing, but are still missing core libraries for it. In particular, there is a need for an equivalent to the mathematical library (libm) available with e

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::a97e7eb8c087023df1a5eec4505473f7
https://doi.org/10.1109/fpl.2007.4380621

A parameterizable floating-point logarithm operator for FPGAs

Autor: Jérémie Detrey, F. de Dinechin

Publikováno v: Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems and Computers, 2005..

As FPGAs are increasingly being used for floating- point computing, a parameterized floating-point logarithm oper- ator is presented. In single precision, this operator uses a small fraction of the FPGA's resources, has a smaller latency than its sof

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::77d41c9877bdca58001acb8267993cb9
https://doi.org/10.1109/acssc.2005.1599948