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pro vyhledávání: '"F. Tsern"'
Autor:
Yiu-Fai Chan, Bryce D. Horine, Kevin S. Donnelly, M. Allen, Benedict Lau, J. Liu, John T. Ho, M. Muthal, Leung Yu, Michael W. Leddige, J. Wei, Richard DeWitt Crisp, R. Tarver, J. Salmon, F. Tsern, Haw-Jyh Liaw, Trang Nguyen, Kuojim Huang, Roxanne Vu, Yuwen Hsia, Cliff C. Lee, J. Hudson, Alfredo Moncayo, David Nguyen
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:1617-1626
A 2.6 GByte/s megacell that interfaces to single or double byte wide DRAMs or logic chips is implemented using 0.35-0.18 /spl mu/m CMOS technologies. Special I/O circuits are used to guarantee 800 Mbit/s/pin data rate. Microwave PC board design metho