Zobrazeno 1 - 10
of 158
pro vyhledávání: '"F. Salice"'
Publikováno v:
EAI Endorsed Transactions on Internet of Things, Vol 3, Iss 9 (2017)
MEP (Maps for Easy Paths) is a project for the enrichment of geographical maps with information about accessibility of urban pedestrian pathways, targeted at people with mobility problems. In this paper, we describe the tools developed to collect dat
Externí odkaz:
https://doaj.org/article/cffa13936283458ab03b021e582bd519
Akademický článek
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Autor:
W. Fornaciari, F. Salice
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 3:502-506
This brief presents a novel high-performance architecture for implementation of custom digital feed forward neural networks, without on-line learning capabilities. The proposed methodology covers the entire design flow of a neural application, by add
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::258cf0ffce6b06c12ef70c754a04730f
https://doi.org/10.1109/92.475969
https://doi.org/10.1109/92.475969
Publikováno v:
DFT
In this paper we propose a mitigation technique for the protection of critical data in electronic devices from Single Error Upsets (SEU) that manifest themselves as bit-flips in memory. In order to cope with this problem, we take advantage of convolu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c4ce26625918a7331f926bc752af6a0b
https://doi.org/10.1109/dft.2008.36
https://doi.org/10.1109/dft.2008.36
Publikováno v:
European Test Symposium
Convolutional coding is usually exploited to protect data transmitted over channels, where they are more susceptible to errors. However in recent years, an increasing interest has been drawn to the problem of radiation-induced temporary faults, also
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::54ad960ad22725c4ec7c298529f61beb
http://hdl.handle.net/11311/538746
http://hdl.handle.net/11311/538746
Autor:
L. Frigerio, F. Salice
Publikováno v:
2007 2nd International Design and Test Workshop.
When realizing a reliable digital system, special attention has to be paid if the target device is an FPGA. In this case, classical fault tolerance techniques are usually not suited to protect the design. This is due to the actual resources used to i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ed43f60a3a6b659bdcff78d910669aab
https://doi.org/10.1109/idt.2007.4437448
https://doi.org/10.1109/idt.2007.4437448
Autor:
F. Salice, W. Fornaciari
Publikováno v:
Proceedings of 1994 37th Midwest Symposium on Circuits and Systems.
The aim of this paper is to present a methodology covering the digital synthesis of a Hopfield neural network. The obtained system is based on a proper pipelined/multiplexed connection among some basic processing elements called pseudo-neurons and is
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8190c9922e87b9a2d45f6e3815ebbb6e
https://doi.org/10.1109/mwscas.1994.519287
https://doi.org/10.1109/mwscas.1994.519287
Publikováno v:
Proceedings of 3rd International Conference on Algorithms and Architectures for Parallel Processing.
A methodology to design a digital special purpose neurocomputer implementing feedforward multilayer neural networks is presented. The design flow consists of three stages: the weight discretization, which relaxes the precision requirements maintainin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e1de3c8202f1a0c5fbcf53a4d4633053
https://doi.org/10.1109/icapp.1997.651532
https://doi.org/10.1109/icapp.1997.651532