Zobrazeno 1 - 10
of 268
pro vyhledávání: '"F. Ponthenier"'
Autor:
F. Guyader, P. Batude, P. Malinge, E. Vire, J. Lacord, J. Jourdon, J. Poulet, L. Gay, F. Ponthenier, S. Joblot, A. Farcy, L. Brunet, A. Albouy, C. Theodorou, M. Ribotta, D. Bosch, E. Ollier, D. Muller, M. Neyens, D. Jeanjean, T. Ferrotti, E. Mortini, J.G. Mattei, A. Inard, R. Fillon, F. Lalanne, F. Roy, E. Josse
Publikováno v:
2022 International Electron Devices Meeting (IEDM).
Autor:
P. Batude, O. Billoint, S. Thuries, P. Malinge, C. Fenouillet-Beranger, A. Peizerat, G. Sicard, P. Vivet, S. Reboh, C. Cavalcante, L. Brunet, M. Ribotta, L. Brevard, X. Garros, T. Mota Frutuoso, B. Sklenard, J. Lacord, J. Kanyandekwe, S. Kerdiles, P. Sideris, C. Theodorou, V. Lapras, M. Mouhdach, G. Gaudin, G. Besnard, I. Radu, F. Ponthenier, A. Farcy, E. Jesse, F. Guyader, T. Matheret, P. Brunet, F. Milesi, L. Le Van-Jodin, A. Sarrazin, B. Perrin, C. Moulin, S. Maitrejean, M. Alepidis, I. Ionica, S. Cristoloveanu, F. Gaillard, M. Vinet, F. Andrieu, J. Arcamone, E. Ollier
Publikováno v:
2021 IEEE International Electron Devices Meeting (IEDM).
Autor:
Benoit Sklenard, Bastien Giraud, Sebastien Thuries, Mikael Casse, Joris Lacord, Cm. Ribotta, V. Lapras, P. Acosta-Alba, O. Billoint, M. Mouhdach, N. Rambal, Pascal Besson, Francois Andrieu, Perrine Batude, Didier Lattard, Laurent Brunet, Gilles Sicard, Xavier Garros, Christoforos G. Theodorou, L. Brevard, Maud Vinet, V. Mazzocchi, P. Sideris, M. Ribotta, Claire Fenouillet-Beranger, F. Ponthenier, Pascal Vivet, Sebastien Kerdiles, G. Cibrario, J.M. Hartmann, Frank Fournel, Bernard Previtali, Frédéric Mazen, Claude Tabone
Publikováno v:
2021 IEEE International Interconnect Technology Conference (IITC)
2021 IEEE International Interconnect Technology Conference (IITC), Jul 2021, Kyoto, France. pp.1-1, ⟨10.1109/IITC51362.2021.9537356⟩
2021 IEEE International Interconnect Technology Conference (IITC), Jul 2021, Kyoto, France. pp.1-1, ⟨10.1109/IITC51362.2021.9537356⟩
The aim of this paper is to present the 3D-sequential integration and its main prospective application sectors. The presentation will also give a synoptic view of all the key enabling process steps required to build high performance Si CMOS integrate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5a896dcadaa6b8a425398da1a162204f
https://hal.archives-ouvertes.fr/hal-03434018
https://hal.archives-ouvertes.fr/hal-03434018
Autor:
Stephane Bernabe, Yvain Thonnart, Alexis Farcy, Philippe Grosse, Benoit Charbonnier, Jean Charbonnier, Pierre Tissier, Karim Hassan, F. Ponthenier, Vincent Reboud, Remi Velard, Jean-Emmanuel Broquin
Publikováno v:
2021 IEEE 71st Electronic Components and Technology Conference (ECTC).
Silicon ring resonators on SOI substrates are well known and widely studied devices for silicon photonics-based systems. They are commonly used in datacom and highperformance computing for wavelength multiplexing, modulation and spectral filters. The
Autor:
Frederic Boeuf, Jean Charbonnier, Benoit Charbonnier, Stephane Bernabe, F. Ponthenier, Pierre Tissier, Alexis Farcy, Jean-Emmanuel Broquin, Remi Velard
Publikováno v:
2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC).
In the framework of High Performance Computing and Datacom, silicon photonics interposers propose an interesting approach, while providing new challenges. This paper demonstrates such an integration and focuses on TSV Mid integration impact on sensit
Autor:
Didier Campos, P. Coudrain, Yorrick Exbrayat, Lucile Arnaud, Stephane Minoret, F. Ponthenier, Andrea Vinci, Severine Cheramy, Alain Gueugnot, Daniel Scevola, Cesar Fuguet Tortolero, P. Chausse, Roselyne Segaud, Giovanni Romano, Christophe Aumont, Didier Lattard, Jean Charbonnier, Pierre-Emile Philip, C. Ribiere, Arnaud Garnier, Jean Michailos, Mathilde Gottardi, Raphael Eleouet, Frédéric Berger, Eric Guthmuller, Gilles Simon, Jerome Beltritti, Gilles Romero, Maxime Argoud, Denis Dutoit, Alexis Farcy, Nacima Allouti, Therry Mourier, Remi Velard, Pascal Vivet, Corinne Legalland
Publikováno v:
2019 IEEE 69th Electronic Components and Technology Conference (ECTC).
We report the first successful technology integration of chiplets on an active silicon interposer, fully processed, packaged and tested. Benefits of chiplet-based architectures are discussed. Built up technology is presented and focused on 3D interco
Autor:
F. Aussenac, P. Acosta-Alba, V. Beugin, V. Mazzocchi, Xavier Garros, Mikael Casse, Sebastien Kerdiles, C. Vizioz, C. Guerin, N. Rambal, F. Ponthenier, J. Micout, Perrine Batude, Maud Vinet, Bernard Previtali, Francois Andrieu, Claire Fenouillet-Beranger, S. Chevalliez, J-M. Pedini, Laurent Brunet
Publikováno v:
2019 Electron Devices Technology and Manufacturing Conference (EDTM).
This paper highlights the last technological breakthroughs achieved in the development of low temperature process modules at 500°C for 3D sequential integration. The two remaining process steps (low temperature gate stack and selective silicon raise
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Akademický článek
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Autor:
C. Scibetta, S. Beaurepaire, F. Fournel, A. Roman, S. Chevalliez, C. Fenouillet-Beranger, X. Garros, Xavier Federspiel, J. Aubin, V. Larrey, Perrine Batude, F. Kouemeni-Tchouake, F. Ponthenier, J-B. Pin, Daniel Scevola, Lucile Arnaud, F. Aussenac, C. Guerin, P. Acosta-Alba, V. Mazzocchi, Sebastien Kerdiles, H. Fontaine, Shay Reboh, P. Perreau, Sylvain Maitrejean, Laurent Brunet, N. Rambal, M. Vinet, Pascal Besson, Christophe Morales, T. Lardin, V. Balan, Vincent Jousseaume, D. Ney, F. Mazen, Francois Andrieu
Publikováno v:
2018 IEEE International Electron Devices Meeting (IEDM)
The 3D sequential integration, of active devices requires to limit the thermal budget of top tier processing to low temperature (LT) (i.e. $\mathrm{T}_{\text{TOP}}=500^{\circ}\mathrm{C})$ in order to ensure the stability of the bottom devices. Here w