Zobrazeno 1 - 10
of 45
pro vyhledávání: '"F. Neuilly"'
Autor:
Malgorzata Jurczak, M. Masahara, F. Neuilly, Liesbeth Witters, Serge Biesemans, E. Suzuki, Christa Vrancken, R. Surdeanu, Katia Devriendt, V.H. Nguyen, G. Van den bosch, Eddy Kunnen, G. Doornbos
Publikováno v:
Microelectronic Engineering. 84:2097-2100
Flexibly controllable threshold voltage (V"t"h) asymmetric gate oxide thickness (T"o"x) independent double-gate (DG) FinFETs (4T-FinFETs) have been demonstrated. Thin drive-gate oxide (HfO"2 or SiON or SiO"2) and slightly thick V"t"h-control-gate oxi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::abc10484f53a634250135d32668b96a2
https://doi.org/10.1016/j.mee.2007.04.033
https://doi.org/10.1016/j.mee.2007.04.033
Publikováno v:
Nano Letters. 7:896-899
We demonstrate highly reproducible silicon nanowire diodes fabricated with a fully VLSI compatible etching technology, with diameters down to 30 nm. A contact technology based on recrystallized polysilicon enables specific contact resistances as low
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::59091cd82d3cda5c0464338a4f00af3e
https://doi.org/10.1021/nl062681n
https://doi.org/10.1021/nl062681n
Autor:
R. van Schaijk, Robert Beurze, P.G. Tello, Michiel Slotboom, A.H. Miranda, D. Dormans, W. Baks, M.J. van Duuren, F. Neuilly, N. Akil
Publikováno v:
Solid-State Electronics. 49:1849-1856
16 Mb 2-transistor (2T)-SONOS flash memories have been processed in a 0.18 μm CMOS technology. The 2T NOR architecture allows fast random access and low power program and erase by tunneling. Also, negative erased threshold voltages enable low voltag
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d6f45c63a18648757e5a6cffdc671685
https://doi.org/10.1016/j.sse.2005.10.017
https://doi.org/10.1016/j.sse.2005.10.017
Autor:
V.H. Nguyen, R. Surdeanu, Serge Biesemans, Malgorzata Jurczak, F. Neuilly, Liesbeth Witters, Katia Devriendt, M. Masahara, Christa Vrancken, G. Van den bosch, Eddy Kunnen, G. Doornbos
Publikováno v:
IEEE Electron Device Letters. 28:217-219
Flexibly controllable threshold-voltage (Vth) asymmetric gate-oxide thickness (Tox) four-terminal (4T) FinFETs with HfO2 [equivalentoxidethickness(EOT)=1.4 nm] for the drive gate and HfO2+thick SiO2 (EOT=6.4-9.4 nm) for the Vth-control gate have been
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5e97298f35a4ba58cb33e4e7d1495f42
https://doi.org/10.1109/led.2007.891303
https://doi.org/10.1109/led.2007.891303
Publikováno v:
IEEE Electron Device Letters
IEEE Electron Device Letters, Institute of Electrical and Electronics Engineers, 2010, 31, pp.23-25. ⟨10.1109/LED.2009.2034542⟩
IEEE Electron Device Letters, 2010, 31, pp.23-25. ⟨10.1109/LED.2009.2034542⟩
IEEE Electron Device Letters, Institute of Electrical and Electronics Engineers, 2010, 31, pp.23-25. ⟨10.1109/LED.2009.2034542⟩
IEEE Electron Device Letters, 2010, 31, pp.23-25. ⟨10.1109/LED.2009.2034542⟩
A new approach for the fabrication of large contour-mode single-crystal silicon resonators has been demonstrated without the use of SOI substrates. Twenty-four-megahertz disk resonators have been built thanks to industrial facilities dedicated to the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4356f9a4f6ffd04ddeaed33f3865f1b6
https://hal.archives-ouvertes.fr/hal-00548984
https://hal.archives-ouvertes.fr/hal-00548984
Autor:
M. Sworowski, Lionel Buchaillot, F. Neuilly, Bernard Legrand, A. Summanwar, P. Philippe, F. Lallemand
Publikováno v:
TRANSDUCERS 2009 - 2009 International Solid-State Sensors, Actuators and Microsystems Conference.
A new approach for the fabrication of large contour-mode single-crystal silicon resonators has been demonstrated without the use of SOI substrates. 24-MHz-disk resonators have been built thanks to industrial facilities dedicated to the integration of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::443cd46e44951d94f942f47438eec980
https://doi.org/10.1109/sensor.2009.5285623
https://doi.org/10.1109/sensor.2009.5285623
Autor:
Angel Rodríguez, T. Nesheiwat, N. Zhang, F. Neuilly, Francis Zaato, E. Hijzen, J. Melai, HongJiang Sun, W.D. van Noort
Publikováno v:
Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting, 2008 (BCTM 2008)., 93-96
STARTPAGE=93;ENDPAGE=96;TITLE=Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting, 2008 (BCTM 2008).
STARTPAGE=93;ENDPAGE=96;TITLE=Proceedings of IEEE Bipolar/BiCMOS Circuits and Technology Meeting, 2008 (BCTM 2008).
The third generation of NXP 0.25 mum SiGe BiCMOS technology (QUBiC4Xi) is presented. The NPN has fT/fmax of 216/177 GHz and BVcb0 of 5.2 V. The high-voltage NPN has 12 V BVcb0, and fT/fmax of 80/162 GHz. This is complemented with an improved MIM capa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::86430482946b9573c17526c7f37ea762
https://doi.org/10.1109/bipol.2008.4662720
https://doi.org/10.1109/bipol.2008.4662720
Publikováno v:
2008 Ph.D. Research in Microelectronics and Electronics.
The notching phenomenon has been observed during high aspect ratio silicon etching while performing an etch stop on a dielectric layer. It is generally considered as a critical issue in the fabrication of MEMS structures on SOI substrates. This artic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8ac3dc9c5214179011188b1d1726de22
https://doi.org/10.1109/rme.2008.4595742
https://doi.org/10.1109/rme.2008.4595742
Publikováno v:
Proceedings of the 19th International Symposium on Power Semiconductor Devices and IC's.
Automotive applications require full dielectric isolation of the high voltage and analog components. Such isolation is typically realized by BCD technologies built on SOI. The drawbacks of using SOI wafers, i.e. deviation from the baseline bulk CMOS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ab1ecfb7cd60bd6ef51e7fceccb7678
https://doi.org/10.1109/ispsd.2007.4294937
https://doi.org/10.1109/ispsd.2007.4294937
Autor:
Philippe Leray, F. Vleugels, W.D. van Noort, A. Piontek, Eddy Kunnen, L.J. Choi, F. Neuilly, J.J.T.M. Donkers, S. Van Huylenbroeck, Stefaan Decoutere, E.A. Hijzen, Rafael Venegas, A. Sibaja-Hernandez, P. Meunier-Beillard
Publikováno v:
2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.
A novel isolation scheme is presented in this work, which uses oxide filled cavities in the collector to separate the extrinsic base and collector regions. When incorporated in our 0.13μm SiGe:C BiCMOS technology, a further improvement of the device
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0172fc51f29d30131b51cf43738ca56b
https://doi.org/10.1109/smic.2007.322805
https://doi.org/10.1109/smic.2007.322805