Zobrazeno 1 - 10
of 60
pro vyhledávání: '"F. Neppl"'
Autor:
A.W. Wieder, F. Neppl
Publikováno v:
IEEE Micro. 12:10-19
CMOS has become the mainstream IC technology. Extending well into the sub-0.1- mu m regime, its potential provides enormous chip complexities for integration of complete systems on one chip. A number of general trends in the development and manufactu
Publikováno v:
Microelectronic Engineering. 13:473-476
A lateral etching technique is presented that allows the reproducible realization of 0.2 μm lines with a standard 1.0 μm g-line stepper lithography. The lateral etching was applied to the submicron device development. MOSFETs with quarter-micron ga
Publikováno v:
Proceedings of the IEEE International Conference on Microelectronic Test Structures.
Publikováno v:
Technical Digest., International Electron Devices Meeting.
For more realistic lifetime predictions of CMOS technology a stress test was developed that yields the relevant transistor degradation under dynamic stress and simultaneously the impact of transistor degradation on circuit speed performance. Thus unc
Autor:
F. Neppl
Publikováno v:
e & i Elektrotechnik und Informationstechnik. 114:464-465
Mikroelektronik in Form von ICs ist im Alltag allgegenwartig: Taschenrechner, Chipkarten fur Zahlungsverkehr oder als Datentrager, Maschinensteuerungen, Telekommunikationssysteme mit diversen Diensten usw. ICs tragen auf vielfaltige Weise zu Arbeitse
Autor:
Gilbert Declerck, F. Neppl, G. Janssen, Wilfried Vandervorst, A. Montree, C. Hill, H. Ryssel, A. van Ommen, J. Lorenz, M. Rudan, M. Haond, P. Felix, P. Patruno, R. DeKeersmaecker, Herman Maes, L. Van den hove
Publikováno v:
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. 12:2852
The ADEQUAT project [Advanced Developments for Quarter Micron complementary metal–oxide–semiconductor (CMOS) Technologies] is executed by a European consortium under the JESSI/ESPRIT programs. It aims at developing new device structures and proce
Autor:
Konrad Hieber, F. Neppl
Publikováno v:
Thin Solid Films. 140:131-136
The possibility of depositing TaSi 2 by sputtering and chemical vapour deposition (selective and non-selective deposition) opens a wide variety of applications for this material in very-large-scale integration technology. The following examples are b
Publikováno v:
Le Journal de Physique Colloques. 49:C4-405
Autor:
U. Schwabe, F. Neppl
Publikováno v:
IEEE Journal of Solid-State Circuits. 17:138-141
Results on the electrical resistivity, the stress, and the etching behavior of TaSi/sub 2/ films evaporated under various residual gas conditions, and the correlations to changes in the crystalline structure as determined by X-ray diffractometer meas
Autor:
F. Neppl, U. Schwabe
Publikováno v:
IEEE Transactions on Electron Devices. 29:508-511
Results on the electrical resistivity, the stress, and the etching behavior of TaSi 2 films evaporated under various residual gas conditions, and the correlations to changes in the crystalline structure as determined by X-ray diffractometer measureme