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Publikováno v:
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).
This paper presents a new method to identify mismatch-relevant transistor pairs at the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9f08a163da88beb663a0cbc682d66767
https://doi.org/10.1109/cicc.2001.929802
https://doi.org/10.1109/cicc.2001.929802
